Micrel, Inc.

SM802141

April 2012

3

M9999-041812-A

Pin Description (Continued)

Pin Number

Pin Name

Pin

Type

Pin Level

Pin Function

5, 11, 16, 18

TEST

Factory test pins. Do not connect anything to these pins.

1

VDD

PWR

Core Power Supply .

13, 14, 15

VSS (Exposed Pad)

PWR

Core Power Supply Ground. The exposed pad must be

connected to the VSS ground plane.

17

VDDO1

PWR

Power Supply for Output Bank 1.

21

VSSO1

PWR

Power Supply Ground for Output Bank 1.

8

REF_IN

I, (SE)

LVCMOS

Reference Clock Input.

9

XTAL_IN

I, (SE)

XTAL

Crystal Reference Input. No load caps needed (see Figure 5).

10

XTAL_OUT

O, (SE)

XTAL

Crystal Reference Output. No load caps needed (see Figure 5).

6

FSEL

I, (SE)

LVCMOS

Frequency Select, 1 = 312.5/125 MHz, 0 = 156.25/62.5MHz,

45KΩ pull-up.

7

OE1

I, (SE)

LVCMOS

Output Enable, Q1 disables to tri-state, 0 = Disabled, 1 =

Enabled, 45KΩ pull-up.

12

OE2

I, (SE)

LVCMOS

Output Enable, Q2 disables to tri-state, 0 = Disabled, 1 =

Enabled, 45KΩ pull-up.

Truth Table

PLL_BYPASS

XTAL_SEL

OE1

OE2

INPUT

OUTPUT

0



1

1



PLL

1



1

1



XTAL/REF_IN



0

1

1

REF_IN





1

1

1

XTAL







0

1



Q1 Tri-State





1

0



Q2 Tri-State

Output Selection Table

XTAL_SEL

PLL_Bypass

F SEL

OE1

OE2

Div 1

Div 2

Q1

Q2

L

H

x

H

L

x

x

Reference Input

Hi-Z

H (Default)

H

x

H

L

x

x

25

Hi-Z

H (Default)

L (Default)

H (Default)

H

L

10

25

312.5

Hi-Z

H (Default)

L (Default)

H (Default)

L

H

10

25

Hi-Z

125

H (Default)

L (Default)

L

H

L

20

50

156.25

Hi-Z

H (Default)

L (Default)

L

L

H

20

50

Hi-Z

62.5