전자부품 데이터시트 검색엔진 |
|
TPD2S017 데이터시트(PDF) 1 Page - Texas Instruments |
|
|
TPD2S017 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 12 page 1 FEATURES APPLICATIONS 1 6 Ch2_Out 2 5 V CC 3 Ch1_Out GND Ch1_In 4 Ch2_In DESCRIPTION/ORDERING INFORMATION TPD2S017 www.ti.com .......................................................................................................................................................................................... SLLS949 – SEPTEMBER 2009 2-CHANNEL ULTRA-LOW CLAMP VOLTAGE ESD SOLUTION WITH SERIES-RESISTOR ISOLATION • Hi-Speed USB • Ultra-Low Clamp Voltage Ensures the Protection of Ultra-Low Voltage Core Chipset • IEEE 1394 Interface During ESD Events • Low-Voltage Differential Signaling (LVDS) • Exceeds ESD Protection to IEC61000-4-2 • Mobile Display Digital Interface (MDDI)/Mobile Industry Processor Interface (MIPI) (Level 4) • HS Signal • Matching of Series Resistor (R =1 Ω) of ±8 mΩ (Typical) DBV PACKAGE • Differential Channel Input Capacitance (TOP VIEW) Matching of 0.02 pF (Typical) • High-Speed Data Rate and EMI Filter Action at High Frequencies (–3 dB Bandwidth, ≈3 GHz) • Available in 6-Pin Small-Outline Transistor [SOT (DBV)] Package • Flow-Through Single-In-Line Pin Mapping for the High-Speed Lines Ensures no Additional Board Layout Burden While Placing the ESD Protection Chip Near the Connector The TPD2S017 provides a robust system-level ESD solution for the high-speed lines interfacing low-voltage, ESD-sensitive core chipset. This device offers two stage ESD clamps in each line with ≈1-Ω series resistor isolation. This architecture allows the device to generate very low clamp voltage during system level ESD strikes. Due to the series resistor component, the TPD2S017 provides a controlled filter roll-off for even greater spurious EMI suppression and signal integrity. This device offers a flow-through pin mapping for ease of board layout. The monolithic silicon technology allows matching component values, including clamp capacitance, series resistor matching, etc., between the differential signal pairs. Tight matching of the line capacitance and series resistors ensure that the differential signal distortion due to added ESD clamp remains minimal, and also allow the part to operate at high-speed differential data rate (in excess of 1.5 Gbps). The TPD2S017 confirms the IEC61000-4-2 (Level 4) ESD protection and ±15 kV HBM ESD protection. This device is offered in space saving DBV packages. The TPD2S017 is characterized for operation over ambient air temperature of –40°C to 85°C. ORDERING INFORMATION TA PACKAGE(1)(2) ORDERABLE PART NUMBER TOP-SIDE MARKING –40°C to 85°C SOT (SOT-23) – DBV Reel of 3000 TPD2S017DBVR NFTF (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
유사한 부품 번호 - TPD2S017 |
|
유사한 설명 - TPD2S017 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |