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LM25575Q 데이터시트(PDF) 11 Page - Texas Instruments |
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LM25575Q 데이터시트(HTML) 11 Page - Texas Instruments |
11 / 29 page Sample and Hold DC Level 1V/A RAMP TON tON CRAMP (10 µ x (VIN – VOUT) + 50 µ) x LM25575, LM25575Q www.ti.com SNVS479F – JANUARY 2007 – REVISED FEBRUARY 2009 Error Amplifier and PWM Comparator The internal high gain error amplifier generates an error signal proportional to the difference between the regulated output voltage and an internal precision reference (1.225V). The output of the error amplifier is connected to the COMP pin allowing the user to provide loop compensation components, generally a type II network, as illustrated in Typical Application Circuit and Block Diagram. This network creates a pole at DC, a zero and a noise reducing high frequency pole. The PWM comparator compares the emulated current sense signal from the RAMP generator to the error amplifier output voltage at the COMP pin. RAMP Generator The ramp signal used in the pulse width modulator for current mode control is typically derived directly from the buck switch current. This switch current corresponds to the positive slope portion of the output inductor current. Using this signal for the PWM ramp simplifies the control loop transfer function to a single pole response and provides inherent input voltage feed-forward compensation. The disadvantage of using the buck switch current signal for PWM control is the large leading edge spike due to circuit parasitics that must be filtered or blanked. Also, the current measurement may introduce significant propagation delays. The filtering, blanking time and propagation delay limit the minimum achievable pulsewidth. In applications where the input voltage may be relatively large in comparison to the output voltage, controlling small pulsewidths and duty cycles is necessary for regulation. The LM25575 utilizes a unique ramp generator, which does not actually measure the buck switch current but rather reconstructs the signal. Reconstructing or emulating the inductor current provides a ramp signal to the PWM comparator that is free of leading edge spikes and measurement or filtering delays. The current reconstruction is comprised of two elements; a sample & hold DC level and an emulated current ramp. Figure 6. Composition of Current Sense Signal The sample & hold DC level illustrated in Figure 6 is derived from a measurement of the re-circulating Schottky diode anode current. The re-circulating diode anode should be connected to the IS pin. The diode current flows through an internal current sense resistor between the IS and PGND pins. The voltage level across the sense resistor is sampled and held just prior to the onset of the next conduction interval of the buck switch. The diode current sensing and sample & hold provide the DC level of the reconstructed current signal. The positive slope inductor current ramp is emulated by an external capacitor connected from the RAMP pin to AGND and an internal voltage controlled current source. The ramp current source that emulates the inductor current is a function of the Vin and Vout voltages per the following equation: IRAMP = (10µ x (Vin – Vout)) + 50µA (2) Proper selection of the RAMP capacitor depends upon the selected value of the output inductor. The value of CRAMP can be selected from: CRAMP = L x 10 -5, where L is the value of the output inductor in Henrys. With this value, the scale factor of the emulated current ramp will be approximately equal to the scale factor of the DC level sample and hold (1.0 V / A). The CRAMP capacitor should be located very close to the device and connected directly to the pins of the IC (RAMP and AGND). Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM25575 LM25575Q |
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