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74HC40103PW 데이터시트(PDF) 2 Page - NXP Semiconductors

부품명 74HC40103PW
상세설명  8-bit synchronous binary down counter
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 12 November 2004
2 of 25
Philips Semiconductors
74HC40103
8-bit synchronous binary down counter
2.
Features
s Cascadable
s Synchronous or asynchronous preset
s Low-power dissipation
s Complies with JEDEC standard no. 7A
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s Multiple package options
s Specified from
−40 °Cto+80 °C and from −40 °C to +125 °C.
3.
Applications
s Divide-by-n counters
s Programmable timers
s Interrupt timers
s Cycle/program counters.
4.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(C
L × VCC
2
× f
o) = sum of outputs.
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL, tPLH
propagation delay CP to TC CL = 15 pF;
VCC = 5 V
-30
-
ns
fmax
maximum clock frequency
CL = 15 pF;
VCC = 5 V
-
32
-
MHz
CI
input capacitance
-
3.5
-
pF
CPD
power dissipation
capacitance
VI = GND to VCC
[1] -24
-
pF


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