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ICS9159-20 데이터시트(PDF) 4 Page - Integrated Circuit Systems

부품명 ICS9159-20
상세설명  Frequency Generator for SIS551X and SIS6205 Chip Set Systems
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

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ICS9159-20
Electrical Characteristics at 3.3V
VDD = 3.1 – 3.7 V, TA = 0 – 70° C
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
AC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Rise Time1
Tr1
20pF load, 0.8 to 2.0V CPU, BOUT & BUS
-
0.9
1.5
ns
Fall Time
1
Tf1
20pF load, 2.0 to 0.8V CPU, BOUT & BUS
-
0.8
1.4
ns
Rise Time1
Tr2
20pF load, 20% to 80% CPU, BOUT & BUS
-
1.5
2.5
ns
Fall Time
1
Tf2
20pF load, 80% to 20% CPU, BOUT & BUS
-
1.4
2.4
ns
Duty Cycle
1
Dt
20pF load @j V
OUT
=1.4V
45
50
55
%
Jitter, One Sigma
1
Tj1s1
CPU
Load=20pF
Bin=EXTCLK
-
50
150
ps
Jitter, Absolute1
Tjab1
CPU
Load=20pF
Bin=EXTCLK
-250
-
250
ps
Jitter, One Sigma1
Tj1s2
BUS; Load=20pF
-
1
3
%
Jitter, Absolute
1
Tjab2
BUS; Load=20pF
-5
2
5
%
Input Frequency
1
Fi
12.0
14.318
16.0
MHz
Logic Input Capacitance
1
CIN
Logic input pins
-
5
-
pF
Crystal Oscillator Capacitance
1
CINX
X1, X2 pins
-
18
-
pF
Power-on Time
1
ton
From VDD=1.6V to 1 st crossing of 66.5 MHz
VDD supply ramp < 40ms
-
2.5
4.5
ms
Frequency Settling Time1
ts
From 1st crossing of acquisition to <
1% settling
-
2.0
4.0
ms
Clock Skew Window1
Tsk1
BOUT to BOUT; Load=20pF; @1.4V
-
150
250
ps
Clock Skew Window
1
Tsk2
BUS to BUS; Load=20pF; @1.4V
-
300
500
ps
Clock Skew Window1
Tsk3
BOUT to BUS; Load=20pF; @1.4V
1
2.6
5
ps


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