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74LVC574ABQ 데이터시트(PDF) 5 Page - NXP Semiconductors

부품명 74LVC574ABQ
상세설명  Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger 3-state
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74LVC574ABQ 데이터시트(HTML) 5 Page - NXP Semiconductors

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74LVC574A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 18 December 2012
5 of 19
NXP Semiconductors
74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
6.
Functional description
[1]
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW to HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW to HIGH CP transition
 = LOW to HIGH clock transition
Z = high-impedance OFF-state
7.
Limiting values
[1]
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2]
The output voltage ratings may be exceeded if the output current ratings are observed.
[3]
For SO20 packages: above 70
C the value of P
tot derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60
C the value of P
tot derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
C the value of P
tot derates linearly with 4.5 mW/K.
Table 3.
Functional table[1]
Operating modes
Input
Internal
flip-flop
Output
OE
CP
Dn
Qn
Load and read register
L
lL
L
L
hH
H
Load register and disable outputs
H
lL
Z
H
hH
Z
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
0.5
+6.5
V
IIK
input clamping current
VI < 0
50
-
mA
VI
input voltage
[1]
0.5
+6.5
V
IOK
output clamping current
VO > VCC or VO < 0
-
50
mA
VO
output voltage
output HIGH or LOW state
[2]
0.5
VCC + 0.5
V
IO
output current
VO = 0 V to VCC
-
50
mA
ICC
supply current
-
100
mA
IGND
ground current
100
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
Tamb = 40 C to +125 C
[3] -500
mW


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