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AD9260 데이터시트(PDF) 10 Page - Analog Devices

부품명 AD9260
상세설명  High Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate
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AD9260
Rev. C | Page 10 of 44
INPUT CLOCK
RESET
DAV
tRES-DAV
tCLK-DAV
Figure 9. RESET Timing Diagram
SWITCHING SPECIFICATIONS
AVDD = +5 V, DVDD = +5 V, CL = 20 pF, TMIN to TMAX unless otherwise noted.
Table 9.
Parameters
Symbol
AD9260
Unit
Clock Period
tC
50
ns min
Data Available (DAV) Period
tDAV
tC ×Mode
ns min
Data Invalid
tDI
40% tDAV
ns max
Data Set-Up Time
tDS
tDAV –tH –tDI
ns min
Clock Pulse-Width High
tCH
22.5
ns min
Clock Pulse-Width Low
tCL
22.5
ns min
Data Hold Time
tH
3.5
ns min
RESET to DAV Delay
tRES–DAV
10
ns typ
CLOCK to DAV Delay
tCLK–DAV
15
ns typ
Three-State Output Disable Time
tOD
8
ns typ
Three-State Output Enable Time
tOE
45
ns typ


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