Dual-Channel, 14-Bit CCD Signal

Processor with Precision Timing Core

AD9978

Rev. SpB

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FEATURES

Dual AFE channels

1.8 V analog and digital core supply voltage

Serial data output with reduced range LVDS outputs

Differential analog inputs

CDS or SHA configuration (CDS bypass) with

−3 dB, 0 dB, +3 dB, and +6 dB gain

6 dB to 42 dB, 10-bit variable gain amplifier (VGA)

14-bit, 65 MHz analog-to-digital converter (ADC)

Black level clamp with variable level control

Precision Timing core with 240 ps resolution @ 65 MHz

APPLICATIONS

Digital video cameras

Digital still cameras

Digital copiers

Multifunction printers

High speed industrial cameras

GENERAL DESCRIPTION

The AD9978 is a highly integrated, dual-channel CCD signal

processor for high speed digital video camera applications. Each

channel is specified at pixel rates of up to 65 MHz and consists of

a complete analog front end with ADC conversion. The Precision

Timing™ core allows adjustment of the correlated double sampler

(CDS) and sample-and-hold amplifier (SHA) clocks with 240 ps

resolution at 65 MHz operation. The AD9978 also contains a

reduced range, low voltage differential signaling (LVDS) interface

for the dual-channel data outputs.

Each analog front end includes black level clamping, a CDS,

a VGA, and a 65 MHz, 14-bit ADC. Operation is programmed

using a 3-wire serial interface.

Packaged in a space-saving, 6 mm × 6 mm, 40-lead LFCSP, the

AD9978 is specified over an operating temperature range of

−25°C to +85°C.

FUNCTIONAL BLOCK DIAGRAM

INP_A

INM_A

INM_B

INP_B

–3dB, 0dB, +3dB, +6dB

–3dB, 0dB, +3dB, +6dB

CDS/

SHA

VGA

6dB TO 42dB

CLAMP

ADC

VD

HD

SDATA

SCK

CLI

CLK_OUT

DOUT0P

DOUT0N

DOUT1P

DOUT1N

DOUT2P

DOUT2N

DOUT3P

DOUT3N

TCLKP

TCLKN

SL

CLAMP

VREF

ADC

6dB TO 42dB

CDS/

SHA

VGA

PRECISION

TIMING

CORE

SYNC

GENERATOR

INTERNAL CLOCKS

INTERNAL

REGISTERS

LVDS

SERIALIZER

AD9978

Figure 1.

For more information about the AD9978, contact Analog Devices via email at afe.ccd@analog.com.