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74ALVCH16373 데이터시트(PDF) 9 Page - NXP Semiconductors

부품명 74ALVCH16373
상세설명  2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
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제조업체  PHILIPS [NXP Semiconductors]
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74ALVCH16373
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 6 — 10 July 2012
9 of 18
NXP Semiconductors
74ALVCH16373
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
[1]
All typical values are measured at Tamb =25 C.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
Typical values are measured at VCC = 2.5 V.
[4]
Typical values are measured at VCC = 3.3 V.
[5]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
(C
L  VCC
2
 f
o) = sum of the outputs.
tdis
disable time
nOE to nQn; see Figure 8
[2]
VCC = 1.2 V
-
8.9
-
ns
VCC = 1.8 V
1.5
3.2
5.6
ns
VCC = 2.3 V to 2.7 V
[3]
1.0
2.2
4.1
ns
VCC = 2.7 V
1.0
3.1
4.7
ns
VCC = 3.0 V to 3.6 V
[4]
1.0
2.8
4.1
ns
tW
pulse width
nLE HIGH; see Figure 7
VCC = 1.8 V
3.5
1.0
-
ns
VCC = 2.3 V to 2.7 V
[3]
3.0
1.0
-
ns
VCC = 2.7 V
3.0
1.0
-
ns
VCC = 3.0 V to 3.6 V
[4]
2.5
1.0
-
ns
tsu
set-up time
nDn to nLE; see Figure 9
VCC = 1.8 V
1.0
0.1
-
ns
VCC = 2.3 V to 2.7 V
[3]
1.0
0.1
-
ns
VCC = 2.7 V
1.0
0.1
-
ns
VCC = 3.0 V to 3.6 V
[4]
1.0
0.0
-
ns
th
hold time
nDn to nLE; see Figure 9
VCC = 1.8 V
1.2
0.1
-
ns
VCC = 2.3 V to 2.7 V
[3]
1.5
0.2
-
ns
VCC = 2.7 V
1.5
0.4
-
ns
VCC = 3.0 V to 3.6 V
[4]
1.2
0.2
-
ns
CPD
power dissipation
capacitance
per flip-flop; VI =GND to VCC
[5]
outputs enabled
-
16
-
pF
outputs disabled
-
10
-
pF
Table 7.
Dynamic characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit Figure 10.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit


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