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74ALVCH16501 데이터시트(PDF) 4 Page - NXP Semiconductors |
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4 / 18 page 74ALVCH16501 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 — 10 July 2012 4 of 18 NXP Semiconductors 74ALVCH16501 18-bit universal bus transceiver; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 5. Pin configuration 74ALVCH16501 OEAB GND LEAB CPAB A0 B0 GND GND A1 B1 A2 B2 VCC VCC A3 B3 A4 B4 A5 B5 GND GND A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 A11 B11 GND GND A12 B12 A13 B13 A14 B14 VCC VCC A15 B15 A16 B16 GND GND A17 B17 OEBA CPBA LEBA GND 001aal716 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 Table 2. Pin description Symbol Pin Description OEAB 1 output enable A-to-B input LEAB 2 latch enable A-to-B input A0 to A17 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 data inputs or outputs GND 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 ground (0 V) VCC 7, 22, 35, 50 positive supply voltage OEBA 27 output enable B-to-A LEBA 28 latch enable B-to-A |
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