전자부품 데이터시트 검색엔진 |
|
DAC5674 데이터시트(PDF) 4 Page - Texas Instruments |
|
DAC5674 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 40 page DAC5674 SLWS148A − SEPTEMBER 2003 − REVISED OCTOBER 2005 www.ti.com 4 DC ELECTRICAL CHARACTERISTICS (CONTINUED) over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 3.3 V, DVDD = 1.8 V, IOUTFS = 20 mA, Rset = 1.91 kΩ, internal reference, unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY (CONTINUED) IDVDD Digital supply current AVDD = 3.3 V, DVDD = 1.8 V, 4 × interpolation, PLL on, 9-MHz IF, 400 MSPS 107 140 mA ISLEEP3.3 Sleep mode Sleep mode, supply current 3.3 V 6 12 mA ISLEEP1.8 Sleep mode Sleep mode, supply current 1.8 V 0.5 3 mA IPLLVDD PLL supply current(1) Fdata = 100 MSPS, Fupdate = 400 MSPS, DIV[1:0] = ’00’, AVDD = 3.3 V, DVDD = 1.8 V, 4 × interpolation, PLL on, 9-MHz IF, 400 MSPS 23 35 mA IIOVDD Buffer supply current AVDD = 3.3 V, DVDD = 1.8 V, 4 × interpolation, PLL on, 9-MHz IF, 400 MSPS 4 10 mA ICLKVDD Clock supply current(1) AVDD = 3.3 V, DVDD = 1.8 V, 4 × interpolation, PLL on, 9-MHz IF, 400 MSPS 6 10 mA PD Power dissipation AVDD = 3.3 V, DVDD = 1.8 V, 4 × interpolation, PLL on, 9-MHz IF, 400 MSPS 435 550 mW APSRR Power supply rejection ratio −0.2 0.2 %FSR/V DPSRR −0.2 0.2 %FSR/V Operating range −40 85 °C Specifications subject to change without notice. (1) PLL enabled AC ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 1.8 V, DVDD = 1.8 V, IOUTFS = 20 mA, differential transformer coupled output, 50- Ω doubly terminated load (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG OUTPUT fCLK Maximum output update rate 400 MSPS ts(DAC) Output settling time to 0.1% Midscale transition 20 ns tr(IOUT) Output rise time 10% to 90%(1) 1.4 ns tf(IOUT) Output fall time 90% to 10%(1) 1.5 ns Output noise IOUTFS = 20 mA 55 pA/ √HZ Output noise IOUTFS = 2 mA 30 pA/ √HZ AC LINEARITY 1:1 IMPEDANCE RATIO TRANSFORMER (ALL AC MEASUREMENTS PLLVDD = 0 V) Spurious free dynamic range (First fDATA = 52 MSPS, fOUT = 14 MHz, TA = 25_C 85 SFDR Spurious free dynamic range (First Nyquist zone < fDATA/2) X4 LL-mode fDATA = 100 MSPS, fOUT = 21 MHz, TMIN to TMAX 76 dBc SFDR Nyquist zone < fDATA/2) X4 LL-mode fDATA = 100 MSPS, fOUT = 41 MHz, TMIN to TMAX 71 dBc SNR Signal-to-noise ratio (First Nyquist fDATA = 78 MSPS, fOUT = 20 MHz, TMIN to TMAX 71 dB SNR Signal-to-noise ratio (First Nyquist zone < fDATA/2) X4 LL-mode fDATA = 100 MSPS, fOUT = 20 MHz, TMIN to TMAX 70 dB ACPR Adjacent channel power ratio W-CDMA signal with 3.84-MHz BW fDATA = 61.44 MSPS, IF = 15.360 MHz, X4 LL-mode 74 dB ACPR W-CDMA signal with 3.84-MHz BW 5-MHz channel spacing fDATA = 122.88 MSPS, IF = 30.72 MHz, X2 L-mode 69 dB IMD3 Third-order, two-tone intermodulation fDATA = 61.44 MSPS, fOUT = 45.4 and 46.4 MHz, X4 HL-mode 68 dBc IMD3 Third-order, two-tone intermodulation (each tone at −6 dBFS) fDATA = 61.44 MSPS, fOUT = 15.1 and 16.1 MHz, X4 LL-mode 82 dBc IMD Four-tone Intermodulation to Nyquist fDATA = 78 MSPS fOUT = 15.6 MHz, 15.8 MHz, 16.2 MHz, 16.4 MHz, X4 LL-mode 76 dBc IMD Four-tone Intermodulation to Nyquist (each tone at –12 dBFS) fDATA = 52 MSPS fOUT = 68.8 MHz, 69.6 MHz, 71.2 MHz, 72 MHz, X4 HH-mode 64 dBc (1) Measured single-ended into 50-Ω load. |
유사한 부품 번호 - DAC5674_15 |
|
유사한 설명 - DAC5674_15 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |