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ISL3159EFBZ 데이터시트(PDF) 6 Page - Intersil Corporation

부품명 ISL3159EFBZ
상세설명  ±15kV ESD Protected, 125°C, 40Mbps, 5V, PROFIBUS™, Full Fail-safe, RS-485/RS-422 Transceiver
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL3159EFBZ 데이터시트(HTML) 6 Page - Intersil Corporation

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ISL3159E
6
FN6364.2
August 25, 2015
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Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND
(Figure 8, Note 12)
Full
-
-
12
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC
(Figure 8, Note 12)
Full
-
-
12
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)Full
-
-
12
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)Full
-
-
12
ns
Time to Shutdown
tSHDN
(Note 13)
Full
60
-
600
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND
(Figure 8, Notes 13, 15)
Full
-
-
1000
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC
(Figure 8, Notes 13, 15)
Full
-
-
1000
ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
9. Supply current specification is valid for loaded drivers when DE = 0V.
10. Applies to peak current. See “Typical Performance Curves” on page 8 for more information.
11. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
12. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
13. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to
enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown
Mode” on page 12.
14. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN.
15. Set the RE signal high time >700ns to ensure that the device enters SHDN.
16. This is the part-to-part skew between any two units tested with identical test conditions (temperature, VCC, etc.).
17. VCC = 5V ±5%
18. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Test Circuits and Waveforms
FIGURE 3A. VOD AND VOC
FIGURE 3B. VOD WITH COMMON-MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 8) (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18)TYP
MAX
(Note 18)UNIT
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
Y
D
DE
DI
VCC
VOD
375Ω
375Ω
Z
Y
RL = 60Ω
VCM
-7V TO +12V


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