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ISL32603EFUZ 데이터시트(PDF) 9 Page - Intersil Corporation

부품명 ISL32603EFUZ
상세설명  1.8V to 3.3V, Micro-Power, ±15kV ESD, 125°C, Slew Rate Limited, RS-485/RS-422 Transceivers
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL32603EFUZ 데이터시트(HTML) 9 Page - Intersil Corporation

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ISL32600E, ISL32601E, ISL32602E, ISL32603E
9
FN7967.0
June 22, 2012
SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
(Figures 6, 7)
VCC = 1.8V, RDIFF = ∞
Full
256
-
-
kbps
VCC ≥ 3V, RDIFF = 54Ω
Full
460
-
-
kbps
Driver Differential Output Delay
tDD
CD = 50pF (Figure 4)
VCC = 1.8V, RDIFF = ∞
Full
-
750
2600
ns
VCC ≥ 3V, RDIFF = 54Ω
Full
-
350
1500
ns
Driver Differential Output Skew
tSKEW
CD = 50pF (Figure 4)
VCC = 1.8V, RDIFF = ∞
Full
-
120
220
ns
VCC ≥ 3V, RDIFF = 54Ω
Full
-
2
100
ns
Driver Differential Rise or Fall Time
tR, tF
CD = 50pF (Figure 4)
VCC = 1.8V, RDIFF = ∞
Full
150
1700
4500
ns
VCC ≥ 3V, RDIFF = 54Ω
Full
200
400
900
ns
Driver Enable to Output High
tZH
RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Note 9)
Full
-
-
3000
ns
Driver Enable to Output Low
tZL
RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Note 9)
Full
-
-
3000
ns
Driver Disable from Output High
tHZ
RL = 1kΩ, CL = 50pF, SW = GND (Figure 5)
Full
-
-
250
ns
Driver Disable from Output Low
tLZ
RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5)
Full
-
-
250
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Notes 11, 12)
Full
-
-
3000
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Notes 11, 12)
Full
-
-
3000
ns
Time to Shutdown
tSHDN
(Note 11)
Full
50
500
1200
ns
Receiver Input to Output Delay
tPLH, tPHL (Figure 7)
Full
-
180
1000
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 7)
Full
-
35
250
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Note 10) Full
-
-
100
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Note 10)
Full
-
-
100
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
Full
-
-
75
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
Full
-
-
75
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full
-
-
5500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
Full
-
-
5500
ns
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: VCC = 1.8V to 3.6V; Typicals are at VCC = 1.8V,
TA = +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15)
TYP
MAX
(Note 15) UNITS


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