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LM25088 데이터시트(PDF) 4 Page - Texas Instruments |
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LM25088 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 39 page LM25088, LM25088-Q1 SNVS609J – DECEMBER 2008 – REVISED JANUARY 2015 www.ti.com Pin Functions PIN DESCRIPTION APPLICATION INFORMATION NUMBER NAME 1 VIN Input supply voltage IC supply voltage. The operating range is 4.5V to 42V. If the EN pin voltage is below 0.4V the regulator will be in a low power state. If the EN pin voltage is between 0.4V and 1.2V the controller will be in standby mode. If the EN pin voltage is above 1.2V the controller will be 2 EN Enable input operational. An external voltage divider can be used to set a line under voltage shutdown threshold. If the EN pin is left open, a 5µA pull-up current forces the pin to the high state and enables the controller. When SS is below the internal 1.2V reference, the SS voltage will control the error amplifier. An internal 11 µA current source charges an external capacitor to set the start-up rate of the controller. The SS pin is held low in 3 SS Soft-start the standby, VCC UV and thermal shutdown states. The SS pin can be used for voltage tracking by connecting this pin to a master voltage supply less than 1.2V. The applied voltage will act as the reference for the error amplifier. An external capacitor connected between this pin and the GND pin sets the ramp slope used for emulated current mode control. Recommended 4 RAMP Ramp control signal capacitor range 100 pF to 2000 pF. See the Application and Implementation section for selection of capacitor value. The internal oscillator is programmed with a single resistor between this pin and the GND pin. The recommended frequency range is 50 kHz to 1 Internal oscillator MHz. An external synchronization signal, which is higher in frequency than 5 RT/SYNC frequency set input and the programmed frequency, can be applied to this pin through a small synchronization input coupling capacitor. The RT resistor to ground is required even when using external synchronization. 6 GND Ground Ground return. Output of the internal error The loop compensation network should be connected between this pin 7 COMP amplifier and the FB pin. Feedback signal from the This pin is connected to the inverting input of the internal error amplifier. 8 FB regulated output The regulation threshold is 1.205V. 9 OUT Output voltage connection Connect directly to the regulated output voltage. A capacitor connected between DITH pin and GND is charged and discharged by 27 µA current sources. As the voltage on the DITH pin Frequency Dithering 10 DITH ramps up and down, the oscillator frequency is modulated between -5% to (LM25088-1 Only) +5% of the nominal frequency set by the RT resistor. Grounding the DITH pin will disable the frequency dithering mode. The RES pin is normally connected to an external capacitor that sets the timing for hiccup mode current limiting. In normal operation, a 25 µA current source discharges the RES pin capacitor to ground. If cycle-by- cycle current limit threshold is exceeded during any PWM cycle, the Hiccup Mode Restart 10 RES current sink is disabled and RES capacitor is charged by an internal 50 µA (LM25088-2 Only) current. If the RES voltage reaches 1.2V, the HG pin gate drive signal will be disabled and the RES pin capacitor will be discharged by a 1 µA current sink. Normal operation will resume when the RES pin falls below 0.2V. 11 CSG Current Sense Ground Low side reference for the current sense resistor. Current measurement connection for the re-circulating diode. An external sense resistor and an internal sample/hold circuit sense the diode current 12 CS Current sense at the conclusion of the buck switch off-time. This current measurement provides the DC offset level for the emulated current ramp. 13 SW Switching node Connect to the source terminal of the external MOSFET switch. 14 HG High Gate Connect to the gate terminal of the external MOSFET switch. An external capacitor is required between the BOOT and the SW pins to Input for bootstrap 15 BOOT provide bias to the MOSFET gate driver. The capacitor is charged from capacitor VCC via an internal diode during the off-time of the buck switch. VCC tracks VIN up to the regulation level (7.8V Typ). A 0.1 µF to 10 µF Output of the bias ceramic decoupling capacitor is required. An external voltage between 16 VCC regulator 8.3V and 13V can be applied to this pin to reduce internal power dissipation. 4 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LM25088 LM25088-Q1 |
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