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LM26400Y 데이터시트(PDF) 11 Page - Texas Instruments |
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LM26400Y 데이터시트(HTML) 11 Page - Texas Instruments |
11 / 33 page LM26400Y www.ti.com SNVS457D – FEBRUARY 2007 – REVISED OCTOBER 2015 Feature Description (continued) The frequency foldback helps two things. One is to prevent the switch current from running away as a result of the finite minimum ON-time (40 ns or so for the LM26400Y) and the small duty cycle caused by lowered output voltage due to the current limit. The other is it also helps reduce thermal stress both in the IC and the external diode. The current limit threshold of the LM26400Y remains constant over all duty cycles. One thing to pay attention to is that recovery from an overcurrent condition does not go through a soft-start process. This is because the reference voltage at the noninverting input of the error amplifier always sits at 0.6 V during the overcurrent protection. So if the overcurrent condition is suddenly removed, the regulator will bring the FB voltage back to 0.6 V as quickly as possible. This may cause an overshoot in the output voltage. Generally, the larger the inductor or the lower the output capacitance the more the overshoot, and vice versa. If the amount of such overshoot exceeds the allowed limit for a system, add a CFF capacitor in parallel with the upper feedback resistor to eliminate the overshoot. See Load Step Response for more details on CFF. When one channel gets into overcurrent protection mode, the operation of the other channel will not be affected. 7.3.2 Loop Stability To the first order approximation, the LM26400Y has a VFB-to-Inductor Current transfer admittance (that is, ratio of inductor current to FB pin voltage, in frequency domain) close to the plot in Figure 24. The transfer admittance has a DC value of 104 dBS (dBS stands for decibel Siemens. The equivalent of 0 dBS is 1 Siemens.). There is a pole at 1 Hz and a zero at approximately 8 kHz. The plateau after the 8 kHz zero is about 27 dBS. There are also high frequency poles that are not shown in the figure. They include a double pole at 1.2 MHz or so, and another double pole at half the switching frequency. Depending on factors such as inductor ripple size and duty cycle, the double pole at half the switching frequency may become two separate poles near half the switching frequency. Figure 24. VFB-to-Inductor Current Transfer Admittance An easy strategy to build a stable loop with reasonable phase margin is to try to cross over from 20 kHz to 100 kHz, assuming the output capacitor is ceramic. When using pure ceramic capacitors at the output, simply use the following equation to find out the crossover frequency. where • 22S (22 Siemens) is the equivalent of the 27 dBS transfer admittance • r is the ratio of 0.6 V to the output voltage (1) Use the same equation to find out the needed output capacitance for a given crossover frequency. Phase margin is typically between 50° and 60°. The above equation is only good for a crossover from 20 kHz to 100 kHz. A crossover frequency outside this range may result in lower phase margin and less accurate prediction by the above equation. Example: VOUT = 2.5 V, COUT = 36 µF, find out the crossover frequency. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM26400Y |
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