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TPS54880 데이터시트(PDF) 8 Page - Texas Instruments |
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TPS54880 데이터시트(HTML) 8 Page - Texas Instruments |
8 / 23 page TPS54880 SLVS450A − OCTOBER 2002 REVISED APRIL 2005 www.ti.com 8 APPLICATION INFORMATION Figure 8 shows the schematic diagram for a typical TPS54880 application. The TPS54880 (U1) can provide greater than 8 A of output current at a nominal output voltage of 1.8 V. For proper thermal performance, the exposed thermal PowerPAD underneath the integrated circuit package must be soldered to the printed-circuit board. To provide power up tracking, the enable of the I/O supply should be used. If the I/O enable is not used to power up, then devices with similar undervoltage lockout thresholds need to be implemented to ensure power up tracking. To ensure power down tracking, the enable pin should be used. R3 I/O Power Supply VOUT_I/O U1 RT ENA TRACKIN VBIAS VIN VIN VIN VIN VIN PGND PGND PGND PGND PGND PwrPad AGND VSENSE COMP PWRGD BOOT PH PH PH PH PH PH PH PH PH 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 10 kΩ R1 10 kΩ R4 10 kΩ R6 9.76 kΩ VIN C6 10 µF C7 10 µF C2 1 µF C5 0.047 µF L1 0.65 µH R9 2.2 Ω C11 3300 pF C1 470 pF C4 12 pF R5 10 kΩ C8 22 µF C9 22 µF C10 22 µF R7 301 Ω C3 470 pF R8 9.76 kΩ R2 71.5 kΩ Analog and Power Grounds are Tied at the Power Pad Under the Package of IC VOUT_CORE TPS54810 Figure 8. Application Circuit COMPONENT SELECTION The values for the components used in this design example were selected for low output ripple voltage and small PCB area. Additional design information is available at www.ti.com. INPUT FILTER The input voltage is a nominal 5 Vdc. The input filter C6 is a 10-µF ceramic capacitor (Taiyo Yuden). C7 also a 10-µF ceramic capacitor (Taiyo Yuden) provides high frequency decoupling of the TPS54880 from the input supply and must be located as close as possible to the device. Ripple current is carried in both C6 and C7, and the return path to PGND must avoid the current circulating in the output capacitors C8, C9, and C10. FEEDBACK CIRCUIT The values for these components have been selected to provide low output ripple voltage. The resistor divider network of R3 and R8 sets the output voltage for the circuit at 1.8 V. R3, along with R7, R5, C1, C3, and C4 form the loop compensation network for the circuit. For this design, a Type 3 topology is used. OPERATING FREQUENCY In the application circuit, the 350 kHz operation is selected by leaving RT open. Connecting a 180 kΩ to 68 kΩ resistor between RT (pin 28) and analog ground can be used to set the switching frequency to 280 kHz to 700 kHz. To calculate the RT resistor, use the equation below: R + 500 kHz Switching Frequency 100 [kW] OUTPUT FILTER The output filter is composed of a 0.65-µH inductor and 3 x 22-µF capacitor. The inductor is a low dc resistance (0.017 Ω) type, Pulse Engineering PA0227. The capacitors used are 22-µF, 6.3 V ceramic types with X5R dielectric. The feedback loop is compensated so that the unity gain frequency is approximately 75 kHz. (1) |
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