© 2013 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN48632

• Rev. 1.0.3

3

Pin Configuration

Figure 3. Top Through View (Bumps Down)

Figure 4. Bottom View (Bumps Up)

Pin Definitions

Pin #

Name

Description

A1

EN

Enable. When this pin is HIGH, the circuit is enabled.

(2)

A2

PG

Power Good. This is an open-drain output. PG is actively pulled LOW if output falls out of

regulation due to overload or if thermal protection threshold is exceeded.

A3

–A4

VIN

Input Voltage. Connect to Li-Ion battery input power source.

(2)

B1

VSEL

Output Voltage Select. When boost is running, this pin can be used to select output voltage.

B2, C2

D1

AGND

Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured

with respect to this pin.

B3

–B4

VOUT

C1

BYP

Bypass. This pin can be used to activate Forced Bypass Mode. When this pin is LOW, the

bypass switches (Q3 and Q1) are turned on and the IC is otherwise inactive.

C3

–C4

SW

Switching Node. Connect to inductor.

D2

–D4

PGND

returned with the shortest path possible to these pins.

Note:

2.

The EN pin can be tied to VIN, but it is recommended to tie EN to the 1.8 V logic voltage.

AGND

VIN

VSEL

PG

AGND

PGND

SW

VOUT

EN

B1

B2

C2

A1

A2

B3

A3

C3

D1

D2

D3

C1

A4

B4

C4

D4

BYP

B4

A4

D4

C4

B3

C3

D3

A3

B2

A2

C2

D2

A1

C1

D1

B1