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SI3402-B-GM 데이터시트(PDF) 10 Page - Silicon Laboratories |
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SI3402-B-GM 데이터시트(HTML) 10 Page - Silicon Laboratories |
10 / 21 page Si3402-B 10 Rev. 1.0 3. Functional Description The Si3402 consists of two major functions: a hotswap controller/interface and a complete pulse-width- modulated switching regulator (controller and power FET). 3.1. Overview The hotswap interface of the Si3402 provides the complete front end of an 802.3-compliant PD. The Si3402 also includes two full diode bridges, a transient voltage surge suppressor, detection circuit, classification current source, and dual-level hotswap current limiting switch. This high level of integration enables direct connection to the RJ-45 connector, simplifies system design, and provides significant advantages for reliability and protection. The Si3402 requires only four standard external components (detection resistor, optional classification resistor, load capacitor, and input capacitor) to create a fully 802.3- compliant interface. For more information about supporting higher-power applications, see “AN313: Using the Si3402 in High Power Applications” and “AN314: Power Combining Circuit for PoE for up to 18.5 W Output”. The Si3402 integrates a complete pulse-width modulated switching regulator that includes the controller and power FET. The switching regulator utilizes a constant frequency pulse-width modulated controller optimized for all possible load conditions in PoE applications. The regulator integrates a low on- resistance (Ron) switching power MOSFET that minimizes power dissipation, increases overall regulator efficiency, and simplifies system design. An integrated error amplifier, precision reference, and soft-start feature provide the flexibility of using a non-isolated buck regulator topology or an isolated flyback regulator topology. The Si3402 is designed to operate with both 802.3- compliant Power Sourcing Equipment (PSE) and pre- standard (legacy) PSEs that do not adhere to the 802.3 specified inrush current limits. The Si3402 is compatible with compliant and legacy PSEs because it uses two levels for the hotswap current limits. By setting the initial inrush current limit to a low level, a PD based on the Si3402 minimizes the current drawn from either a compliant or legacy PSE during startup. After powering up, the Si3402 automatically switches to a higher-level current limit, thereby allowing the PD to consume up to 12.95 W (the max power allowed by the 802.3 specification). Excessive power cycling or short circuit faults will engage the thermal overload protection to prevent the on-chip power MOSFETs from exceeding their safe and reliable operating ranges. By properly sizing the devices and implementing on-chip thermal protection, the Si3402 can go through multiple turn-on sequences without overheating the package or damaging the device. The switching regulator power MOSFET has been designed and sized to withstand the high peak currents created when converting a high-voltage, low- current supply into a low-voltage, high-current supply. 3.2. PD Hotswap Controller The Si3402 hotswap controller changes its mode of operation based on the input voltage applied to the CT1 and CT2 pins or the SP1 and SP2 pins, the 802.3- defined modes of operation, and internal controller requirements. Table 9 defines the modes of operation for the hotswap interface. Figure 3. Hotswap Block Diagram DIODE BRIDGES AND PROTECTION DETECTION CONTROL ON OFF VPOSF VNEG CT1/SP1 CT2/SP2 0 V 12 V RDET CLASSIFICATION CONTROL ON OFF 12 V 22 V RCL CENTRAL BIAS BANDGAP REF 10 V 5 V 1.23 V CURRENT LIMIT HI/LO HOTSWAP CONTROL ON OFF 39 V 32 V SWITCHER STARTUP & BIAS IABS ITC VREF HSO POWER LOSS DETECTOR PLOSS SSFT VPOSS ISOSSFT |
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