전자부품 데이터시트 검색엔진 |
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SI5380A-B-GM 데이터시트(PDF) 11 Page - Silicon Laboratories |
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SI5380A-B-GM 데이터시트(HTML) 11 Page - Silicon Laboratories |
11 / 50 page 3.3.6 Zero Delay Mode A zero delay mode is available for applications that require fixed and consistent minimum delay between the selected input and outputs. The zero delay mode is configured by opening the internal feedback loop through software configuration and closing the loop externally as shown in the figure below. This helps to cancel out the internal delay introduced by the dividers, the crosspoint, the input, and the output drivers. Any one of the outputs can be fed back to the IN3/FB_IN pins, although using the output driver that achieves the short- est trace length will help to minimize the input-to-output delay. The OUT9A and IN3/FB_IN pins are recommended for the external feed- back connection. The FB_IN input pins must be terminated and ac-coupled when zero delay mode is used. A differential external feed- back path connection is necessary for best performance. The order of the OUT9A and FB_IN polarities is such that they may be routed on the device side of the PCB without requiring vias or needing to cross each other. Si5380 IN0 IN0b IN1 IN1b IN2 IN2b ÷P1 ÷P0 ÷P2 DSPLL LPF PD ÷M IN3/FB_IN ÷P3 IN3b/FB_INb ÷N0 t0 ÷N1 t1 ÷N2 t2 ÷N3 t3 ÷N4 t4 OUT2b VDDO2 OUT2 VDDO0 OUT0Ab OUT0A OUT0b OUT0 ÷R2 ÷R0A ÷R0 VDDO8 OUT8b OUT8 ÷R8 VDDO9 OUT9b OUT9 OUT9Ab OUT9A ÷R9 ÷R9A External Feedback Path ÷5 Figure 3.6. Si5380 Zero Delay Mode Set-up Si5380 Data Sheet Functional Description silabs.com | Smart. Connected. Energy-friendly. Rev. 0.96 | 10 |
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