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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DLPC410ZYR 데이터시트(PDF) 6 Page - Texas Instruments |
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DLPC410ZYR 데이터시트(HTML) 6 Page - Texas Instruments |
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6 / 63 page  DLPC410 DLPS024C – AUGUST 2012 – REVISED DECEMBER 2015 www.ti.com Pin Functions PIN TERMINATION ACTIVE DATA TYPE SIGNAL CLOCK DESCRIPTION /NOTES (Hi or Lo) RATE NAME NO. APPS_CNTL_DPN F7 - - This pair connected with 100 - - Not Used Ω resistor between pair. APPS_CNTL_DPP E7 - - - - Not Used ARST AC13 I LVCMOS25_S_ Lo - DLPC410 Reset 12_I AVDD_0 M14 - - Not used - connect to - - Xilinx System Monitor analog Ground (no name in supply - (not used - must be Reference Design) connected to ground) AVSS_0 M13 - - Not used - connect to - - Xilinx System Monitor analog Ground (no name in ground - (not used - must be Reference Design) connected to ground) BLKAD_0 E12 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Address bit 0 12_I BLKAD_1 D13 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Address bit 1 12_I BLKAD_2 E13 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Address bit 2 12_I BLKAD_3 F13 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Address bit 3 12_I BLKMD_0 H13 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Mode Bit 0 12_I BLKMD_1 H14 I LVCMOS25_S_ Hi = 1 DDC_DCLK_[A,B,C,D] Block Mode Bit 1 12_I CLKIN_R AD13 I LVCMOS25_S_ - Reference Clock Reference Clock 12_I COMP_DATA G19 I LVCMOS25_S_ Hi DDC_DCLK_[A,B,C,D] Compliment Data (0 <--> 1) 12_I CS_B_0 N18 - - 1 k Ω pulldown to ground Lo - Xilinx Config D_OUT_BUSY_0 W11 - NC Do not connect - - Not Used DAD_A_ADDR0 E1 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Reset 12_O number 1 Address 0 pin Block bit 0 DAD_A_ADDR1 E2 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Reset 12_O Number 1 Address 1 pin Block bit 1 DAD_A_ADDR2 E3 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Reset 12_O Number 1 Address 2 pin Block bit 2 DAD_A_ADDR3 F3 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Reset 12_O Number 1 Address 3 pin Block bit 3 DAD_A_MODE0 C1 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1Mode bit 0 12_O Number 1 Mode 0 pin DAD_A_MODE1 D1 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Mode bit 12_O Number 1 Mode 1 pin 1 DAD_A_SCPEN AE3 O LVCMOS25_F_ Connected to DLPA200 Lo - DLPA200 Number 1 SCP 12_O Number 1 SCPEN pin Communication Enable DAD_A_SEL0 AB12 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Address 12_O Number 1 SEL 0 pin bit 0 DAD_A_SEL1 AC12 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 1 Address 12_O Number 1 SEL 1 pin bit 1 DAD_A_STROBE AF3 O LVCMOS25_F_ Connected to DLPA200 Hi - DLPA200 Number 1 Transition 12_O Number 1 STROBE pin Strobe DAD_B_ADDR0 E26 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Reset 12_O Number 2 Address 1 pin Block bit 0 DAD_B_ADDR1 E25 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Reset 12_O Number 2 Address 2 pin Block bit 1 DAD_B_ADDR2 F25 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Reset 12_O Number 2 Address 3 pin Block bit 2 DAD_B_ADDR3 F24 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Reset 12_O Number 2 Address 0 pin Block bit 3 DAD_B_MODE0 D26 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Mode bit 12_O Number 2 Mode 0 pin 0 DAD_B_MODE1 D25 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Mode bit 12_O Number 2 Mode 1 pin 1 DAD_B_SCPEN AB19 O LVCMOS25_F_ Connected to DLPA200 Lo - DLPA200 Number 2 SCP 12_O Number 2 SCPEN pin Communication Enable DAD_B_SEL0 R22 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Address 12_O Number 2 SEL 0 pin bit 0 DAD_B_SEL1 R23 O LVCMOS25_F_ Connected to DLPA200 Hi = 1 - DLPA200 Number 2 Address 12_O Number 2 SEL 1 pin bit 1 DAD_B_STROBE AB20 O LVCMOS25_F_ Connected to DLPA200 Hi - DLPA200 Number 2 Transition 12_O Number 2 STROBE pin Strobe 6 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: DLPC410 |
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