전자부품 데이터시트 검색엔진 |
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TS9004 데이터시트(PDF) 10 Page - Silicon Laboratories |
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TS9004 데이터시트(HTML) 10 Page - Silicon Laboratories |
10 / 13 page TS9004 Page 10 TS9004 Rev. 1.0 out of the region where oscillation occurs. Figure 1 illustrates the case in which an IN- input is a fixed voltage and an IN+ is varied. If the input signals were reversed, the figure would be the same with an inverted output. To add hysteresis to the TS9004, the circuit in Figure 2 is implemented and uses positive feedback along with two external resistors to set the desired hysteresis. The circuit consumes more current and it slows down the hysteresis effect due to the high impedance on the feedback. The following procedure explains the steps to design the circuit for a desired hysteresis: 1. Choosing R3. As the leakage current at the IN+ pin is less than 1nA, the current through R3 should be at least 100nA to minimize offset voltage errors caused by the input leakage current. For R3 = 11.8M Ω, the current through R3 is VREF/R3 at the trip point. In this case, a 10M Ω resistor is a good standard value for R3. 2. Next, the desired hysteresis band (VHB) is set. In this example, VHB is set to 50mV. 3. Calculating R1. R1 = R3 x VHB V+ = 10M Ω x 50mV 5V = 100kΩ In this example, a 100k Ω, 1% standard value resistor is selected for R1. 4. Choose the trip point for VIN rising (VTHR), which is the threshold voltage at which the comparator switches its output from low to high as VIN rises above the trip point. In this example, choose VTHR = 3V. 5. Calculating R2. R2 = 1 VTHR VREF x R1 - 1 R1 - 1 R3 = 1 3 1.182V x 100k Ω - 1 100k Ω - 1 10M Ω = 65.44kΩ In this example, a 64.9k Ω, 1% standard value resistor is selected for R2. 6. The last step is to verify the trip voltages and hysteresis band using the standard resistance values: VTHR = VREFx R1 x 1 R1 + 1 R2 + 1 R3 VTHF = VTHR – R1 x V+ R3 Board Layout and Bypassing While power-supply bypass capacitors are not typically required, it is good engineering practice to use 0.1 μF bypass capacitors close to the device’s power supply pins when the power supply impedance is high, the power supply leads are long, or there is excessive noise on the power supply traces. To reduce stray capacitance, it is also good engineering practice to make signal trace lengths as short as possible. Also recommended are a ground plane and surface mount resistors and capacitors. Figure 1. Threshold Hysteresis Band Figure 2. External Hysteresis |
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