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DAC3482IRKD25 데이터시트(PDF) 8 Page - Texas Instruments |
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DAC3482IRKD25 데이터시트(HTML) 8 Page - Texas Instruments |
8 / 106 page DAC3482 SLAS748F – MARCH 2011 – REVISED AUGUST 2015 www.ti.com RKD Package Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. Uni-directional serial interface data in 4-pin mode. The SDO pin is tri-stated in 3-pin interface mode SDO B27 O (default). Active high asynchronous hardware power-down input. Internal pull-down. If SLEEP pin is set to logic SLEEP B40 I HIGH before and during device power-up and initialization, the fuse_sleep bit in register 0x1B, bit 11 must be written after register 0x23 during device initialization register setup. Optional LVDS SYNC positive input. The SYNCP/N LVDS pair has an internal 100- Ω termination SYNCP A5 I resistor. If unused it can be left unconnected. SYNCN B5 I Optional LVDS SYNC negative input. Active low input for chip RESET, which resets all the programming registers to their default state. RESETB B30 I Internal pull-up. Transmit enable active high input. Internal pull-down. To enable analog output data transmission, set sif_txenable in register config3 to 1b or pull CMOS TXENABLE A32 I TXENABLE pin to high. To disable analog output, set sif_txenable to 0b and pull CMOS TXENABLE pin to low. The digital logic section is forced to all 0, and any input data is ignored. TESTMODE A44 I This pin is used for factory testing. Internal pull-down. Leave unconnected for normal operation. Digital supply voltage. This supply pin is also used for factory fuse programming. Connect to VFUSE B4 I DACVDD for normal operation. 8 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: DAC3482 |
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