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ST-PLC-AFE 데이터시트(PDF) 11 Page - STMicroelectronics

부품명 ST-PLC-AFE
상세설명  Power-line communication, analog front-end
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST-PLC-AFE 데이터시트(HTML) 11 Page - STMicroelectronics

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ST-PLC-AFE
General description
58
2.2
Tx block
The Tx block is divided into an internal DAC, an internal fourth-order filter, a programmable
amplifier, and a power liner driver. There are two ways to drive this transmission line:
1.
The internal DAC driving mode, achieved through the SPI interface and the internal
10-bit DAC.
2.
Using an external driving mode where the signal received by the ST-PLC-AFE is purely
analog, coming from an external MCU DAC. This signal is applied on the TX_INP input
pin.
Tx PGA can be configured through the SPI to operate as an attenuator or to work in
follower. The gain steps of the Tx PGA are 6 dB, 0 dB, -18 dB, and -36 dB. The gain can be
programmed through the TX_PGA1<1:0> bits in the Gain register.
The Tx_filter is a unity-gain, fourth-order, low-pass filter. Its cutoff frequency is selectable
between CENELEC A or CENELEC B, C, or D modes. The selection of the band is
achieved through the BAND_SEL bit in the Enable register.
2.2.1
Internal DAC driving mode
The ST-PLC-AFE accepts serial data from the microprocessor and writes the data to the
internal DAC registers. Operating in DAC mode results in the lowest distortion signal
injected onto the AC mains. DAC mode is selected by setting the DAC_EN bit in the Enable
register to 1. Figure 5 and Figure 6 show the connection to the power line while using the
internal DAC in differential mode and in single-ended mode respectively.
Figure 5. Connection to the power line in differential mode


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