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SN74AHC1G14HDCK3 데이터시트(PDF) 10 Page - Texas Instruments |
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SN74AHC1G14HDCK3 데이터시트(HTML) 10 Page - Texas Instruments |
10 / 23 page SN74AHC1G14 SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015 www.ti.com Typical Application (continued) 9.2.2 Detailed Design Procedure 1. Recommended input conditions: – For rise time and fall time specifications, see Δt/Δv in the Recommended Operating Conditions table. – For specified high and low levels, see VIH and VIL in the Recommended Operating Conditions table. – Inputs and outputs are overvoltage tolerant and can therefore go as high as 5.5 V at any valid VCC. 2. Recommended output conditions: – Load currents must not exceed ±50 mA. 3. Frequency selection criterion: – The effects of frequency upon the power consumption of the device can be studied in CMOS Power Consumption and CPD Calculation, SCAA035. – Added trace resistance and capacitance can reduce maximum frequency capability; follow the layout practices listed in the Layout Guidelines section. 9.2.3 Application Curves VCC = 5.5 V VCC = 5.5 V Figure 6. AHC Family VOL vs IOL Figure 5. AHC Family VOH vs IOH 10 Submit Documentation Feedback Copyright © 1996–2015, Texas Instruments Incorporated Product Folder Links: SN74AHC1G14 |
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