SN74AHCT1G86

SCLS324M – MARCH 1996 – REVISED MARCH 2015

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74AHCT1G86 is a Low drive CMOS device that can be used for a multitude of bus interface type

applications where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and

undershoot on the outputs. The input switching levels have been lowered to accommodate TTL inputs of 0.8-V

9.2 Typical Application

Figure 4. Typical Application Schematic

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it

can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads

so consider routing and load conditions to prevent ringing.

9.2.2 Detailed Design Procedure

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Recommended input conditions:

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Rise time and fall time specs. See (

Δt/ΔV) in Recommended Operating Conditions.

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•

Recommended output conditions:

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Load currents should not exceed 25 mA per output and 50 mA total for the part.

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8

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