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IRF60R217 데이터시트(PDF) 2 Page - Infineon Technologies AG |
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IRF60R217 데이터시트(HTML) 2 Page - Infineon Technologies AG |
2 / 11 page IRF60R217 2 2016-01-05 Absolute Maximum Rating Symbol Parameter Max. Units A ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 58 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 41 IDM Pulsed Drain Current 217 PD @TC = 25°C Maximum Power Dissipation 83 W Linear Derating Factor 0.56 W/°C VGS Gate-to-Source Voltage ± 20 V TJ TSTG Operating Junction and Storage Temperature Range -55 to + 175 °C Soldering Temperature, for 10 seconds (1.6mm from case) 300 Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy 85 mJ EAS (Thermally limited) Single Pulse Avalanche Energy 124 IAR Avalanche Current See Fig 15, 16, 23a, 23b A EAR Repetitive Avalanche Energy mJ Thermal Resistance Symbol Parameter Typ. Max. Units RJC Junction-to-Case ––– 1.8 °C/W RJA Junction-to-Ambient (PCB Mount) ––– 50 RJA Junction-to-Ambient ––– 110 Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.047 ––– V/°C Reference to 25°C, ID = 1mA RDS(on) Static Drain-to-Source On-Resistance ––– 8.0 9.9 VGS = 10V, ID = 35A ––– 10 ––– VGS = 6.0V, ID = 18A VGS(th) Gate Threshold Voltage 2.1 ––– 3.7 V VDS = VGS, ID = 50µA IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 60V, VGS = 0V ––– ––– 150 VDS = 60V,VGS = 0V,TJ =125°C IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V RG Gate Resistance ––– 2.0 ––– m Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.14mH, RG = 50, IAS = 35A, VGS =10V. ISD 35A, di/dt 862A/µs, VDD V(BR)DSS, TJ 175°C. Pulse width 400µs; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. R is measured at TJ approximately 90°C. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.please refer to application note to AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 16A, VGS =10V. |
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