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SLE66CX322PC 데이터시트(PDF) 3 Page - Infineon Technologies AG |
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SLE66CX322PC 데이터시트(HTML) 3 Page - Infineon Technologies AG |
3 / 9 page SLE 66CX322P Short Product Information 3 / 10 11.02 16-Bit Security Controller with MMU in 0.22µm CMOS Technology 136-Kbyte ROM, 5052 bytes RAM, 32-Kbyte EEPROM 1100-Bit ACE and 112-Bit / 192-Bit DDES-EC2 Accelerator Features • 16-bit microcomputer in 0.22 µm CMOS technology • Instruction set opcode compatible with standard SAB 8051 processor • Enhanced 16-bit arithmetic • Additional powerful instructions optimized for chip card applications • Dedicated, non-standard architecture with execution time 6 times faster (18 times by PLLmax) than standard SAB 8051 processor at same external clock • 134 Kbytes User ROM for application programs • Additional 2 Kbytes reserved ROM for Resource Management System (RMS+ Superslim) with intelligent E² write/erase routines • 32 Kbytes Superslim-EEPROM • 4Kbytes XRAM, 256 bytes internal RAM, 700 bytes Crypto RAM. • Memory Management and Protection Unit (MMU) • Dual Key Triple DES (DDES) and EC2 GF (2 n) Accelerator • Advanced Crypto Engine for up to 2048 bit RSA computation • Certified RSA 2048 library available (refer to product brief) • CRC Module • Interrupt Module • PLL up to 15 MHz • Two 16-bit Autoreload Timer • Power saving sleep mode • Ext. Clock freq. 1 to 7.5 MHz for int. Clock ≤ 15 MHz @ 2.7V-5.5V Ext. Clock freq. 1 to 5 MHz for int. Clock ≤ 11 MHz @ 1.62V-5.5V • UART for handling serial interface in accordance with ISO/IEC 7816 part 3 supporting transmission protocols T=1 and T=0 • I/O routines realized in software executable • Supply voltage range:1.62 to 5.5 V • Current consumption < 10 mA @ 5.5 V < 6 mA @ 3.3 V < 4 mA @ 1.98 V • Temperature range: -25 to +85°C • ESD larger than 6 kV Superslim-EEPROM • Reading and programming byte by byte • Flexible page mode for 1 to 64 bytes write/erase operation • 32 bytes security area (OTP) • Fast personalization mode 0.63 ms @15MHz • Erase + Write time < 4.0 ms @15MHz • Minimum of 500.000 write/erase cycles at 25°C • Data retention for a minimum of 10 years • EEPROM programming voltage generated on chip Memory Management and Protection Unit • Addressable memory up to 1 MByte • Separates OS (system mode) and application (user mode) • System routines called by traps • OS can restrict access to peripherals in application mode • Code execution from XRAM possible Security Features Operation state monitoring mechanism • Low and high voltage sensors • Frequency sensors and filters • Light Sensor • Glitch Sensor • Temperature Sensor • Life Test Function for Sensors |
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