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AD8285 데이터시트(PDF) 2 Page - Analog Devices

부품명 AD8285
상세설명  6-Channel LNA/PGA/AAF with ADC
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD8285 데이터시트(HTML) 2 Page - Analog Devices

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AD8283
Data Sheet
Rev. C | Page 2 of 27
TABLE OF CONTENTS
Features .....................................................................................1
Applications...............................................................................1
Functional Block Diagram.........................................................1
General Description ..................................................................1
Revision History........................................................................2
Specifications.............................................................................3
AC Specifications...................................................................3
Digital Specifications .............................................................5
Switching Specifications.........................................................6
Absolute Maximum Ratings ......................................................7
ESD Caution..........................................................................7
Pin Configuration and Function Descriptions...........................8
Typical Performance Characteristics .......................................10
Theory of Operation................................................................14
Radar Receive Path AFE......................................................14
Channel Overview...............................................................15
ADC.....................................................................................16
Clock Input Considerations.................................................16
Clock Duty Cycle Considerations........................................17
Clock Jitter Considerations..................................................17
SDIO Pin .............................................................................17
SCLK Pin.............................................................................17
CS Pin..................................................................................17
RBIAS Pin............................................................................17
Voltage Reference ................................................................17
Power and Ground Recommendations................................18
Exposed Paddle Thermal Heat Slug Recommendations......18
Serial Peripheral Interface (SPI) ..............................................19
Hardware Interface..............................................................19
Memory Map...........................................................................21
Reading the Memory Map Table..........................................21
Logic Levels.........................................................................21
Reserved Locations..............................................................21
Default Values......................................................................21
Application Diagrams..............................................................25
Outline Dimensions ................................................................27
Ordering Guide ...................................................................27
Automotive Products...........................................................27
REVISION HISTORY
8/15—Rev. B to Rev. C
Changed AD951x/AD952x to AD9515/AD9520-0... Throughout
Added Table 1; Renumbered Sequentially .................................1
10/14—Rev. A to Rev. B
Changes to Addr. (Hex) 0x15, Table 8......................................23
Changes to Ordering Guide.....................................................27
11/13—Rev. 0 to Rev. A
Changed Maximum fSAMPLE from 80 MSPS to 72 MSPS
................................................................................. Throughout
Changed Clock Pulse Width High/Low (tEH/tEL) at 72 MSPS
from 6.25 ns to 6.94ns; Table 3...................................................6
Changes to Figure 25 ...............................................................14
Changes to Register Address 10 Bits[5:0] and Register
Address 0x12, Bit 3; Table 8.....................................................23
Updated Outline Dimensions..................................................27
4/11—Revision0: Initial Version


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