The following specifications apply for V

duty cycle. Boldface limits apply for T

Symbol

Parameter

Conditions

Typical

(Note 9)

Limits

(Note 9)

Units

(Limits)

POWER SUPPLY CHARACTERISTICS

DR I

D

Output Driver Supply Current

DC Input

1

2

mA (max)

f

8

mA (max)

I

DRI

D

Total Operating Current

DC Input

42

52

mA (max)

f

PD = Low

49

CLK Low, PD = Hi

0.2

PC

Power Consumption

DC Input

126

156

mW (max)

f

PD = Low

147

mW

CLK Low, PD = Hi

0.6

mW

PSRR

1

Power Supply Rejection Ratio

FSE change with 2.7V to 3.3V change

in V

A

54

dB

PSRR

2

Power Supply Rejection Ratio

SNR change with 200 mV at 1 MHz

on supply

TBD

dB

AC ELECTRICAL CHARACTERISTICS

f

C1

Maximum Conversion Rate

125

100

MHz (min)

f

C2

Minimum Conversion Rate

20

MHz

t

CL

Minimum Clock Low Time

4.5

ns (min)

t

CH

Minimum Clock High Time

4.5

ns (min)

t

OH

Output Hold Time

CLK Rise to Data Invalid

4.4

ns

t

OD

Output Delay

CLK Rise to Data Valid

5.9

8.5

ns (max)

Pipeline Delay (Latency)

2.5

Clock Cycles

t

AD

Sampling (Aperture) Delay

CLK Fall to Acquisition of Data

1.5

ns

t

AJ

Aperture Jitter

2

ps rms

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed

specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test

conditions.

Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.

should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input

current of 25 mA to two.

junction-to-ambient thermal resistance (

TSSOP,

this device under normal operation will typically be about 162 mW (126 mW quiescent power + 12 mW reference ladder power + 24 mW to drive the output bus

capacitance). The values for maximum power dissipation listed above will be reached only when the ADC08100 is operated in a severe fault condition (e.g., when

input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.

Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k

Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.

Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National

Semiconductor Linear Data Book, for other methods of soldering surface mount devices.

voltage must be

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