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SN74LV4051A

SCLS428I – MAY 1999 – REVISED SEPTEMBER 2015

SN74LV4051A 8-Channel Analog Multiplexers and Demultiplexers

1 Features

3 Description

The

SN74LV4051A

8-channel

CMOS

analog

1

•

multiplexers and demultiplexers are designed for 2-V

•

Support Mixed-Mode Voltage Operation on

All Ports

The SN74LV4051A devices handle both analog and

•

High On-Off Output-Voltage Ratio

digital signals. Each channel permits signals with

•

Low Crosstalk Between Switches

amplitudes up to 5.5-V (peak) to be transmitted in

•

Individual Switch Controls

either direction.

•

Extremely Low Input Current

Applications

include:

signal

gating,

chopping,

modulation or demodulation (modem), and signal

•

Latch-Up Performance Exceeds 100-mA Per

multiplexing for analog-to-digital and digital-to-analog

JESD 78, Class II

conversion systems.

•

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

Device Information(1)

–

200-V Machine Model (A115-A)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

–

1000-V Charged-Device Model (C101)

TSSOP (16)

5.00 mm × 6.30 mm

SOIC (16)

9.90 mm × 6.00 mm

2 Applications

SSOP (16)

6.20 mm × 7.80 mm

•

Telecommunications

SN74LV4051A

TVSOP (16)

3.60 mm × 6.40 mm

PDIP (16)

19.30 mm × 6.35 mm

•

eCall

SO (16)

3.60 mm × 6.40 mm

•

Infotainment

VQFN (16)

3.50 mm × 4.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Logic Diagram (Positive Logic)

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION

DATA.