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APW8855 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 8 Page - Anpec Electronics Coropration

๋ถ€ํ’ˆ๋ช… APW8855
์ƒ์„ธ๋‚ด์šฉ  High Current, High Frequency 7 Outputs Voltage Regulator and Power Management IC for High Performance Tablet and Ultra Notebook Applications
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์ œ์กฐ์‚ฌ  ANPEC [Anpec Electronics Coropration]
ํ™ˆํŽ˜์ด์ง€  http://www.anpec.com.tw
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APW8855 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 8 Page - Anpec Electronics Coropration

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Copyright
ยฉ ANPEC Electronics Corp.
Rev. A.1 - Dec., 2015
APW8855
www.anpec.com.tw
8
11.Pin Description
P IN
NO .
NAME
FUNCTION
1
5 V_A LW_L DO
5V _ALW _LDO Outpu t Pin .
2
5V_A LW_ BYP
5V _ALW _LDO Input Pin. Co nnect to 5V_ ALW Ou tpu t Voltage.
3
5V _ALW _FBP
5V _ALW O utput Voltage Fee dback P in.
4
5V_ ALW_ PWM
5V _ALW PW M Sig nal Outpu t Pin . Co nnect to External po we r stage
โ€™s PWM input pin.
5
1V5 _ALW _IN
1V 5_ALW P WM Reg ulator In put P in.
6
1V 5_ALW_LX
1V 5_ALW P WM Reg ulator LX Pin . Conne ct to e xterna l i nductor for ou tp ut LC fi lte r.
7
1V5 _ALW_PG ND
1V 5_ALW P WM Reg ulator PGND Pin.
8
1 V5_A LW_ FB P
1V 5_ALW P WM Reg ulator Outpu t Vo lta ge Feedb ack Pin.
9
VDDP_ ALW_ GPIO
VDDP_ ALW Ou tp ut Sel ect Pin. Pull hi gh for V PPD_A LW=1 .0 5V, pull low for
VDDP_ ALW=0.95V.
10
V DDP _ALW_FBN
VDDP_ ALW Negative Outpu t Feedb ack Pin . Conne ct to VR5
โ€™s grou nd.
11
VDDP_A LW_FBP
VDDP_ ALW Positive Output Fe edba ck Pin. Connect to VR5
โ€™s output voltage.
12
V DDP _ALW _PWM
VDDP_ ALW PWM Sign al Output P in. Con nect to Exter nal power sta ge
โ€™s PWM in put pin.
13
VDD_FCH_S5_ IN
VDD_FCH_S5 LDO Reg ulator In put P in.
14
V DD_ FCH_S 5 _OUT
VDD_FCH_S5 O utp ut Pi n.
15
VDD_FCH_S 5_RE FIN
VDD_FCH_S5 Tr ack Voltage In put P in.
16
S 5_MUX
VDD_FCH_S5 Tr ack Sel ect Pin. When S5_ MUX=hig h, V DD_FCH_S5 fully tr ack
VDD_FCH_S5_ REFIN vo lta ge; S 5_MUX=lo w, V DD_ FCH_S 5 p artially tra ck
VDD_FCH_S5_ REFIN vo lta ge.
17
1 V8_A LW_ FB P
1V 8_ALW P WM Reg ulator Outpu t Vo lta ge Feedb ack Pin.
18
1V8 _ALW_PG ND
1V 8_ALW P WM Reg ulator Outpu t PGND Pin.
19
1V 8_ALW_LX
1V 8_ALW P WM Reg ulator Outpu t LX Pin . Conne ct to external in ducto r for ou tp ut LC filter.
20
1V8 _ALW _IN
1V 8_ALW P WM Reg ulator In put P in.
21
3V 3_A LW_BY P
3V 3_ALW_LDO Inpu t Pin . Conne ct to 3V 3_ALW Output Vol tag e.
22
3 V3_A LW_ FB P
3V 3_ALW Output Vo ltag e Fe edba ck Pin.
23
3V 3_ALW_PWM
3V 3_ALW P WM S ignal O utp ut Pi n. Conn ect to E xterna l p ower stage
โ€™s PWM inpu t pin.
24
3V3 _ALW_LDO
3V 3_ALW_LDO O utp ut P in.
25
LDO_RTC_IN
L DO _RTC Input Vo lta ge Pin. P rovide a 3.3V po wer in to this pin to e nable LDO _RTC Output.
26
LDO_RTC_ OUT
L DO _RTC Ou tpu t Voltage Pin .
27
GND
IC An alog Gr ound .
28
V SYS
IC P owe r Inp ut P in.
29
I2CDATA
I2C Data Con nection Pin.
30
I2CCLK
I2C Clock Sig nal Pin.
31
PO K
P ower Good Ind icato r. Conn ect a resistor from POK to a pull- high voltage.
32
CTL
S ystem P ower Sta te Control Pin . Pul l CTL h igh to e nable V R1/2 /3 /4/5/7.
E xp osed
P ad
P GND
IC P ower Gro und


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