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TLP558 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - Toshiba Semiconductor

๋ถ€ํ’ˆ๋ช… TLP558
์ƒ์„ธ๋‚ด์šฉ  Isolated Bus Driver High Speed Line Receiver Microprocessor System Interfaces MOS FET Gate Driver Transistor Inverter
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์ œ์กฐ์‚ฌ  TOSHIBA [Toshiba Semiconductor]
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TLP558 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - Toshiba Semiconductor

   
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TLP558
2002-09-25
6
Test Circuit 2: tpHZ, tpZH, tpLZ And tpZL
Test Circuit 3: Common Mode Transient Immunity
VOL
0.5V
Input VE
0V
tpLZ
VOH
tpZL
S1 and S2
Closed
๏ฝž
1.3V
Output
VO
IF = IF (ON)
S1 Closed
S2 Open
Output VO
IF = 0mA
S1 Open
S2 Closed
tpHZ
0.5V
1.3V
0V
S1 and S2
Closed
1.3V
3V
1.5V
๏ฝž
tpZH
VCC
D1๏ฝžD4
D2
: 1S1588
CL
D3
VCC
GND
Monitor
CL is approximately 15pF which includes
probe and stray wiring capacitance.
D1
D4
5V
6
4
1
5
7
IF
VO
8
2
Pulse
generator
ZO=50โ„ฆ
tr = tf = 5ns
3
VE
S2
S1
90%
CMH=
VCM 10%
0V
tr
50V
VOH
Output VOH
Switch at A : IF=0mA
VOL
Switch at B : IF=1.6mA
VO (MIN.)*
VO(MAX.)*
* Note 8
tf
, CML=
45(V)
tf(ยตs)
45(V)
tf(ยตs)
VCC
VCM
VCC
GND
Monitor
Pulse generator
ZO =50โ„ฆ
-

4
1
5
7
IF
VO
8
2
3
VFF
6
+
B
A


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