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54ACT257 데이터시트(PDF) 2 Page - Texas Instruments |
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54ACT257 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 8 page OBSOLETE 54AC257, 54ACT257 SNOS102B – JULY 1998 – REVISED APRIL 2013 www.ti.com Connection Diagrams Figure 3. 16-Pin CERDIP or CLGA Figure 4. 20-Pin LCCC See NAD0016A Package See NAJ0020A Package Functional Description The 'AC/'ACT257 is quad 2-input multiplexer with TRI-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true (noninverted) form. The device is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = OE • (11a • S + I0a • S) Zb = OE • (11b • S + I0b • S) Zc = OE• (11c • S + I0c • S) Zd = OE • (11d • S + I0d • S) When the Output Enable (OE) is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to TRI-STATE devices whose outputs are tied together are designed so there is no overlap. TRUTH TABLE (1) Output Select Data Outputs Enable Input Inputs OE S I0 I1 Z H X X X Z L H X L L L H X H H L L L X L L L H X H (1) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance 2 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links: 54AC257 54ACT257 |
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