전자부품 데이터시트 검색엔진 |
|
ADC10D020CIVSX 데이터시트(PDF) 6 Page - Texas Instruments |
|
ADC10D020CIVSX 데이터시트(HTML) 6 Page - Texas Instruments |
6 / 39 page ADC10D020 SNAS143D – SEPTEMBER 2001 – REVISED MARCH 2013 www.ti.com Converter Electrical Characteristics The following specifications apply for VA = VD = VDR = +3.0 VDC, VREF = 1.0 VDC, GAIN = OF = 0V, OS = 3.0V, VIN (a.c. coupled) = FSR = 1.0 VP-P, CL = 15 pF, fCLK = 20 MHz, 50% Duty Cycle, RS = 50Ω, trc = tfc < 4 ns, NOT offset corrected. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C (1). Typical Units Symbol Parameter Conditions Limits (3) (2) (Limits) STATIC CONVERTER CHARACTERISTICS INL Integral Non-Linearity ±0.65 ±1.8 LSB (max) +1.2 LSB (max) DNL Differential Non-Linearity ±0.35 −1.0 LSB (min) Resolution with No Missing Codes 10 Bits +10 LSB (max) Without Offset Correction −5 −16 LSB (min) VOFF Offset Error +2.0 LSB (max) With Offset Correction +0.5 −1.5 LSB (min) +6 %FS (max) GE Gain Error −4 −14 %FS (min) DYNAMIC CONVERTER CHARACTERISTICS fIN = 1.0 MHz, VIN = FSR −0.1 dB 9.5 Bits fIN = 4.7 MHz, VIN = FSR −0.1 dB 9.5 9.0 Bits (min) ENOB Effective Number of Bits fIN = 9.5 MHz, VIN = FSR −0.1 dB 9.5 Bits fIN = 19.5 MHz, VIN = FSR −0.1 dB 9.5 Bits fIN = 1.0 MHz, VIN == FSR −0.1 dB 59 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB 59 56 dB (min) SINAD Signal-to-Noise Plus Distortion Ratio fIN = 9.5 MHz, VIN = FSR −0.1 dB 59 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB 59 dB fIN = 1.0 MHz, VIN = FSR −0.1 dB 59 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB 59 56 dB (min) SNR Signal-to-Noise Ratio fIN = 9.5 MHz, VIN = FSR −0.1 dB 59 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB 59 dB fIN = 1.0 MHz, VIN = FSR −0.1 dB −73 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB −73 −62 dB (min) THD Total Harmonic Distortion fIN = 9.5 MHz, VIN = FSR −0.1 dB −73 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB −73 dB fIN = 1.0 MHz, VIN = FSR −0.1 dB −84 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB −92 dB HS2 Second Harmonic fIN = 9.5 MHz, VIN = FSR −0.1 dB −87 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB −87 dB fIN = 1.0 MHz, VIN = FSR −0.1 dB −80 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB −78 dB HS3 Third Harmonic fIN = 9.5 MHz, VIN = FSR −0.1 dB −78 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB −78 dB fIN = 1.0 MHz, VIN = FSR −0.1 dB 76 dB fIN = 4.7 MHz, VIN = FSR −0.1 dB 75 dB SFDR Spurious Free Dynamic Range fIN = 9.5 MHz, VIN = FSR −0.1 dB 75 dB fIN = 19.5 MHz, VIN = FSR −0.1 dB 74 dB (1) The inputs are protected as shown below. Input voltage magnitude up to 300 mV beyond the supply rails will not damage this device. However, errors in the A/D conversion can occur if the input goes beyond the limits given in these tables. See Figure 2 (2) Typical figures are at TJ = 25°C, and represent most likely parametric norms. (3) Test limits are specified to TI's AOQL (Average Outgoing Quality Level). Performance is ensured only at VREF = 1.0V and a clock duty cycle of 50%. The limits for VREF and clock duty cycle specify the range over which reasonable performance is expected. Tests are performed and limits specified with clock low and high levels of 0.3V and VD − 0.3V, respectively. 6 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: ADC10D020 |
유사한 부품 번호 - ADC10D020CIVSX |
|
유사한 설명 - ADC10D020CIVSX |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |