SN74CB3T3384

10BIT FET BUS SWITCH

2.5V/3.3V LOW VOLTAGE BUS SWITCH WITH 5V TOLERANT LEVEL SHIFTER

SCDS159B − OCTOBER 2003 − REVISED MARCH 2004

7

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VOH

VOL

CL

(see Note A)

TEST CIRCUIT

S1

2

× VCC

Open

GND

RL

RL

Output

Waveform 1

S1 at 2

× VCC

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

tPZL

tPZH

tPLZ

tPHZ

0 V

VOL + V∆

VOH − V∆

0 V

VCC

VCC

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

50

Ω

VG1

VCC

DUT

50

Ω

VIN

50

Ω

VG2

50

Ω

VI

TEST

RL

S1

V∆

CL

VCC

VI

tPHZ/tPZH

tPLZ/tPZL

2.5 V

± 0.2 V

3.3 V

± 0.3 V

2.5 V

± 0.2 V

3.3 V

± 0.3 V

2

× VCC

2

× VCC

Open

Open

500

Ω

500

Ω

500

Ω

500

Ω

GND

GND

3.6 V

5.5 V

30 pF

50 pF

30 pF

50 pF

0.15 V

0.3 V

0.15 V

0.3 V

Output

Control

(VIN)

Input Generator

Input Generator

VCC/2

VCC/2

VCC/2

VCC/2

VO

Figure 2. Test Circuit and Voltage Waveforms