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DAC7551IDRNT 데이터시트(PDF) 5 Page - Texas Instruments |
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DAC7551IDRNT 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 22 page www.ti.com PIN CONFIGURATION V DD V H REF V L REF V FB V OUT GND IOV DD SDO SDIN SCLK SYNC CLR 1 2 3 4 5 6 12 11 10 9 8 7 DAC7751 Thermal Pad (1) DAC7551 SLAS441E – MARCH 2005 – REVISED APRIL 2007 Pin Descriptions PIN NO. NAME DESCRIPTION 1 VDD Analog voltage supply input 2 VREFH Positive reference voltage input 3 VREFL Negative reference voltage input 4 VFB DAC amplifier sense input. 5 VOUT Analog output voltage from DAC 6 GND(1) Ground. Asynchronous input to clear the DAC registers. When CLR is low, the DAC register is set to 000h and the output 7 CLR voltage to 0V. Frame synchronization input. The falling edge of the SYNC pulse indicates the start of a serial data frame shifted out 8 SYNC to the DAC7551. 9 SCLK Serial clock input 10 SDIN Serial data input 11 SDO Serial data output 12 IOVDD I/O voltage supply input (1) Thermal pad should be connected to GND. 5 Submit Documentation Feedback |
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