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CDC3RL02BYFPR 데이터시트(PDF) 4 Page - Texas Instruments |
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CDC3RL02BYFPR 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 20 page CDC3RL02 SCHS371C – NOVEMBER 2009 – REVISED JANUARY 2016 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range, unless otherwise noted. (1) MIN MAX UNIT VBATT Voltage range(2) –0.3 7 V CLK_REQ_1/2, MCLK_IN –0.3 VBATT + 0.3 Voltage range(3) V VLDO, CLK_OUT_1/2 (2) –0.3 VBATT + 0.3 Input clamp current at VBATT, IIK VI < 0 –50 mA CLK_REQ_1/2, and MCLK_IN IO Continuous output current CLK_OUT1/2 ±20 mA Continuous current through GND, VBATT, VLDO ±50 mA TJ Operating virtual junction temperature –40 150 °C TA Operating ambient temperature range –40 85 °C Tstg Storage temperature range –55 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) All voltage values are with respect to network ground pin. 7.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 V Machine Model 200 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. 7.3 Recommended Operating Conditions See (1) MIN MAX UNIT VBATT Input voltage to internal LDO 2.3 5.5 V VI Input voltage MCLK_IN, CLK_REQ1/2 0 1.89 V VO Output voltage CLK_OUT1/2 0 1.8 V VIH High-level input voltage CLK_REQ1/2 1.3 1.89 V VIL Low-level input voltage CLK_REQ1/2 0 0.5 V IOH High-level output current, DC current –8 mA IOL Low-level output current, DC current 8 mA (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004. 4 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: CDC3RL02 |
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