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SN74ALVCH162827GR 데이터시트(PDF) 1 Page - Texas Instruments |
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SN74ALVCH162827GR 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 13 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE1 1Y1 1Y2 GND 1Y3 1Y4 VCC 1Y 1Y6 1Y7 GND 1Y8 1Y9 1Y10 2Y1 2Y2 2Y3 GND 2Y4 2Y5 2Y6 VCC 2Y7 2Y8 GND 2Y9 2Y10 2OE1 1OE2 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 1A7 GND 1A8 1A9 1A10 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2A9 2A10 2OE2 DGG, DGV, OR DL PACKAGE (TOP VIEW) Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors SN74ALVCH162827 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES013H – JULY 1995 – REVISED AUGUST 2004 • Member of the Texas Instruments Widebus™ Family • Output Ports Have Equivalent 26- Ω Series Resistors, So No External Resistors Are Required • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH162827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. The outputs, which are designed to sink up to 12 mA, include equivalent 26- Ω resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. with the bus-hold circuitry is not recommended. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74ALVCH162827DL SSOP - DL ALVCH162827 Tape and reel SN74ALVCH162827DLR -40 °C to 85°C TSSOP - DGG Tape and reel SN74ALVCH162827GR ALVCH162827 TVSOP - DGV Tape and reel SN74ALVCH162827VR VH2827 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1995–2004, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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