전자부품 데이터시트 검색엔진 |
|
SN74AUP2G126YFPR 데이터시트(PDF) 2 Page - Texas Instruments |
|
|
SN74AUP2G126YFPR 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 24 page AUP LVC AUP AUP LVC Static-PowerConsumption (mA) Dynamic-PowerConsumption (pF) † Single,dual,andtriplegates 3.3-V Logic † 3.3-V Logic † 0% 20% 40% 60% 80% 100% 0% 20% 40% 60% 80% 100% -0.5 0 0.5 1 1.5 2 2.5 3 3.5 0 5 10 15 20 25 30 35 40 45 Time-ns † AUP1G08dataatC =15pF L Output Input SwitchingCharacteristics at25MHz † SN74AUP2G126 SCES687D – JANUARY 2007 – REVISED DECEMBER 2009 www.ti.com Figure 1. AUP – The Lowest Power Family Figure 2. Excellent Signal Integrity The SN74AUP2G126 is a dual bus driver/line driver with 3-state outputs, designed for 0.8-V to 3.6-V VCC operation. The outputs are disabled when the associated output-enable (OE) input is low. This device has the input-disable feature, which allows floating input signals. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION(1) ORDERABLE TOP-SIDE TA PACKAGE(2) PART NUMBER MARKING(3) NanoStar™ – WCSP (DSBGA) Reel of 3000 SN74AUP2G126YFPR _ _ _ HN_ 0.23-mm Large Bump – YFP (Pb-free) NanoStar™ – WCSP (DSBGA) Reel of 3000 SN74AUP2G126YZPR _ _ _ HN_ 0.23-mm Large Bump – YZP (Pb-free) –40°C to 85°C uQFN – DQE Reel of 5000 SN74AUP2G126DQER PW QFN – RSE Reel of 5000 SN74AUP2G126RSER HN VSSOP – DCU Reel of 3000 SN74AUP2G126DCUR H26_ (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (3) YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). DCU: The actual top-side marking has one additional character to designate the wafer fab/assembly site. FUNCTION TABLE INPUTS OUTPUT Y OE A H H H H L L L X(1) Z (1) Floating inputs allowed 2 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): SN74AUP2G126 |
유사한 부품 번호 - SN74AUP2G126YFPR |
|
유사한 설명 - SN74AUP2G126YFPR |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |