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SN74HC02DBR 데이터시트(PDF) 10 Page - Texas Instruments

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부품명 SN74HC02DBR
상세설명  SNx4HC02 Quadruple 2-Input Positive-NOR Gates
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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VIN
VOUT
Copyright © 2016, Texas Instruments Incorporated
10
SN54HC02, SN74HC02
SCLS076F – DECEMBER 1982 – REVISED APRIL 2015
www.ti.com
Product Folder Links: SN54HC02 SN74HC02
Submit Documentation Feedback
Copyright © 1982–2015, Texas Instruments Incorporated
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SNX4HC02 is a low-drive CMOS device that can be used for a multitude of NOR type functions. The device
can produce 4 mA of drive current at 5 V, making it Ideal for driving multiple outputs and good for low-noise
applications. This application is for using a single SNX4HC02 as a falling edge detector circuit.
The edge detector operates by using the inherent propagation delay from input to output of each device stage. In
steady-state, the inputs to the output stage will always be different, and thus the output will always be low. Only
during the brief time when both inputs are low (that is, immediately following a falling edge on VIN), the output will
be high.
9.2 Typical Application
Figure 4. Falling Edge Detector Schematic
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it
can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so
routing and load conditions must be considered to prevent ringing.
The output pulse time will be approximately three times tpd from Switching Characteristics for the selected VCC,
device, and temperature range.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions – For rise time and fall time specifications, see
Δt/ΔV in Recommended
Operating Conditions.
For specified high and low levels, see VIH and VIL in Recommended Operating Conditions.
Inputs are not overvoltage tolerant, allowing them to go as high as VCC.
2. Recommend Output Conditions
Load currents must not exceed 20 mA per output and 50 mA total for the part.
Outputs must not be pulled above VCC.


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