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LMC6492 데이터시트(PDF) 2 Page - Texas Instruments |
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LMC6492 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 28 page LMC6492, LMC6494 SNOS724D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance(3) 2000V Differential Input Voltage ±Supply Voltage Voltage at Input/Output Pin (V+) + 0.3V, (V−) − 0.3V Supply Voltage (V+ − V−) 16V Current at Input Pin ±5 mA Current at Output Pin(4) ±30 mA Current at Power Supply Pin 40 mA Lead Temp. (Soldering, 10 sec.) 260°C Storage Temperature Range −65°C to +150°C Junction Temperature(5) 150°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. (2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. (3) Human body model, 1.5 k Ω in series with 100 pF. (4) Applies to both single-supply and split-supply operation. Continuous short operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. (5) The maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) − TA)/θJA. All numbers apply for packages soldered directly into a PC board. Operating Conditions (1) Supply Voltage 2.5V ≤ V+ ≤ 15.5V Junction Temperature Range LMC6492AE, LMC6492BE −40°C ≤ TJ ≤ +125°C LMC6494AE, LMC6494BE −40°C ≤ TJ ≤ +125°C Thermal Resistance ( θJA) P Package, 8-Pin PDIP 108°C/W D Package, 8-Pin SOIC 171°C/W P Package, 14-Pin PDIP 78°C/W D Package, 14-Pin SOIC 118°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C, V + = 5V, V− = 0V, V CM = VO = V +/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes LMC6492AE LMC6492BE Symbol Parameter Conditions Typ(1) LMC6494AE LMC6494BE Units Limit(2) Limit(2) VOS Input Offset Voltage 0.11 3.0 6.0 mV 3.8 6.8 max TCVOS Input Offset Voltage 1.0 μV/°C Average Drift IB Input Bias Current See(3) 0.15 200 200 pA max IOS Input Offset Current See(3) 0.075 100 100 pA max RIN Input Resistance >10 Tera Ω (1) Typical Values represent the most likely parametric norm. (2) All limits are specified by testing or statistical analysis. (3) Specified limits are dictated by tester limits and not device performance. Actual performance is reflected in the typical value. 2 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMC6492 LMC6494 |
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