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LMC7111 데이터시트(PDF) 2 Page - Texas Instruments |
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LMC7111 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 26 page LMC7111 SNOS753E – AUGUST 1999 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance (3) SOT-23 Package 2000V PDIP Package 1500V Differential Input Voltage ±Supply Voltage Voltage at Input/Output Pin (V+) + 0.3V, (V−) − 0.3V Supply Voltage (V+ − V−) 11V Current at Input Pin ±5 mA Current at Output Pin (4) ±30 mA Current at Power Supply Pin 30 mA Lead Temp. (Soldering, 10 sec.) 260°C Storage Temperature Range −65°C to +150°C Junction Temperature (5) 150°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. (2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. (3) Human Body Model is 1.5 k Ω in series with 100 pF. (4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150°C. (5) The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) − TA)/θJA. All numbers apply for packages soldered directly into a PC board. Operating Ratings (1) Supply Voltage 2.5V ≤ V+ ≤ 11V Junction Temperature Range LMC7111AI, LMC7111BI −40°C ≤ TJ ≤ +85°C Thermal Resistance ( θJA) 8-Pin PDIP 115°C/W 5-Pin SOT-23 325°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not specified. For ensured specifications and the test conditions, see the Electrical Characteristics. 2.7V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C, V + = 2.7V, V− = 0V, V CM = VO = V +/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions LMC7111AI LMC7111BI Units Typ (1) Limit(2) Limit(2) VOS Input Offset Voltage V+ = 2.7V 0.9 3 7 mV 5 9 max TCVOS Input Offset Voltage 2.0 μV/°C Average Drift IB Input Bias Current See (3) 0.1 1 1 pA 20 20 max IOS Input Offset Current See (3) 0.01 0.5 0.5 pA 10 10 max RIN Input Resistance >10 Tera Ω +PSRR Positive Power Supply 2.7V ≤ V+ ≤5.0V, 60 55 55 dB Rejection Ratio V− = 0V, VO = 2.5V 50 50 min −PSRR Negative Power Supply −2.7V ≤ V− ≤−5.0V, 60 55 55 dB Rejection Ratio V− = 0V, VO = 2.5V 50 50 min (1) Typical Values represent the most likely parametric norm. (2) All limits are specified by testing or statistical analysis. (3) Bias Current specified by design and processing. 2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LMC7111 |
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