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TL16C2552IFN 데이터시트(PDF) 6 Page - Texas Instruments

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부품명 TL16C2552IFN
상세설명  1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
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Auto-CTS (See Figure 2)
Enabling Autoflow Control and Auto-CTS
Auto-CTS and Auto-RTS Functional Timing
Start
Bits 0 −7
Start
Bits 0 −7
Start
Bits 0 −7
Stop
Stop
Stop
SOUT
CTS
Start
Byte N
Start
Byte N+1
Start
Byte
Stop
Stop
Stop
SIN
RTS
RD
(RD RBR)
1
2
N
N+1
Byte 14
Byte 15
SIN
RTS
RD
(RD RBR)
Start
Byte 18
Stop
Start
Byte 16
Stop
RTS Released After the
First Data Bit of Byte 16
TL16C2552
SLWS163A – SEPTEMBER 2005 – REVISED JUNE 2006
The transmitter circuitry checks CTS before sending the next data byte. When CTS is active, it sends the next
byte. To stop the transmitter from sending the following byte, CTS must be released before the middle of the last
stop bit that is currently being sent (see Figure 2). The auto-CTS function reduces interrupts to the host system.
When flow control is enabled, CTS level changes do not trigger host interrupts because the device automatically
controls its own transmitter. Without auto-CTS, the transmitter sends any data present in the transmit FIFO and
a receiver overrun error may result.
Autoflow control is enabled by setting modem control register bits 5 (autoflow enable or AFE) and 1 (RTS) to a
1. Autoflow incorporates both auto-RTS and auto-CTS. When only auto-CTS is desired, bit 1 in the modem
control register should be cleared (this assumes that a control signal is driving CTS).
Figure 2. CTS Functional Timing Waveforms
Figure 3. RTS Functional Timing Waveforms, RCV FIFO Trigger Level = 1, 4, or 8 Bytes
Figure 4. RTS Functional Timing Waveforms, RCV FIFO Trigger Level = 14 Bytes
6
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