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TPA3244 데이터시트(PDF) 10 Page - Texas Instruments

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부품명 TPA3244
상세설명  40-W Stereo, 100-W peak PurePath Ultra-HD Pad Down Class-D Amplifier
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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TPA3244
SLASEC6 – APRIL 2016
www.ti.com
Product Folder Links: TPA3244
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Copyright © 2016, Texas Instruments Incorporated
Table 5. Device Protection
OC_ADJ Resistor Value
Protection Mode
OC Threshold
22k
Ω
CB3C
16.3A
24k
Ω
CB3C
15.1A
27k
Ω
CB3C
13.5A
30k
Ω
CB3C
12.3A
47k
Ω
Latched OC
16.3A
51k
Ω
Latched OC
15.1A
56k
Ω
Latched OC
13.5A
64k
Ω
Latched OC
12.3A
7.4.1.2 DC Speaker Protection
The output DC protection scheme protects a connected speaker from excess DC current caused by a speaker
wire accidentally shorted to chassis ground. Such a short circuit results in a DC voltage of PVDD/2 across the
speaker, which potentially can result in destructive current levels. The output DC protection detects any
unbalance of the output and input current of a BTL output, and in the event of the unbalance exceeding a
programmed threshold, the overload counter increments until its maximum value and the affected output channel
is shut down. DC Speaker Protection is disabled in PBTL and SE mode operation.
7.4.1.3 Pin-to-Pin Short Circuit Protection (PPSC)
The PPSC detection system protects the device from permanent damage in the case that a power output pin
(OUT_X) is shorted to GND_X or PVDD_X. For comparison, the OC protection system detects an overcurrent
after the demodulation filter where PPSC detects shorts directly at the pin before the filter. PPSC detection is
performed at startup that is, when VDD is supplied, consequently a short to either GND_X or PVDD_X after
system startup does not activate the PPSC detection system. When PPSC detection is activated by a short on
the output, all half bridges are kept in a Hi-Z state until the short is removed; the device then continues the
startup sequence and starts switching. The detection is controlled globally by a two step sequence. The first step
ensures that there are no shorts from OUT_X to GND_X, the second step tests that there are no shorts from
OUT_X to PVDD_X. The total duration of this process is roughly proportional to the capacitance of the output LC
filter. The typical duration is < 15 ms/
μF. While the PPSC detection is in progress, FAULT is kept low, and the
device will not react to changes applied to the RESET pin. If no shorts are present the PPSC detection passes,
and FAULT is released. A device reset will not start a new PPSC detection. PPSC detection is enabled in BTL
and PBTL output configurations, the detection is not performed in SE mode. To make sure not to trip the PPSC
detection system it is recommended not to insert a resistive load to GND_X or PVDD_X.
7.4.1.4 Overtemperature Protection OTW and OTE
The TPA3244 device has a two-level temperature-protection system that asserts an active-low warning signal
(CLIP_OTW) when the device junction temperature exceeds 125°C (typical) and, if the device junction
temperature exceeds 155°C (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs
being set in the high-impedance (Hi-Z) state and FAULT being asserted low. OTE is latched in this case. To
clear the OTE latch, RESET must be asserted. Thereafter, the device resumes normal operation.
7.4.1.5 Undervoltage Protection (UVP) and Power-on Reset (POR)
The UVP and POR circuits of the TPA3244 device fully protect the device in any power-up/down and brownout
situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are
fully operational when the GVDD_X and VDD supply voltages reach stated in the Electrical Characteristics table.
Although GVDD_X and VDD are independently monitored, a supply voltage drop below the UVP threshold on
any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z)
state and FAULT being asserted low. The device automatically resumes operation when all supply voltages have
increased above the UVP threshold.


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