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TDA9183P 데이터시트(PDF) 5 Page - NXP Semiconductors

부품명 TDA9183P
상세설명  Integrated NTSC comb filter
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9183P 데이터시트(HTML) 5 Page - NXP Semiconductors

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2000 Nov 30
5
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
FUNCTIONAL DESCRIPTION
Input configuration
The Y/CVBS1 and Y/CVBS2 input signals are clamped by
means of an internally generated clamp pulse which is
derived from the sandcastle input signal (pin SC). If no
sandcastle signal is available, a clamp pulse signal may be
applied to pin SC. External clamp capacitors are needed.
The buffered and clamped Y/CVBS1 and Y/CVBS2 signals
are then applied to the input switch. The input switch select
signal (INPSEL) determines whether Y/CVBS1 or
Y/CVBS2 is passed through to the anti-alias low-pass filter.
This 3rd-order low-pass filter is optimized for best
performance with respect to step response and clock
suppression. The filtered signal is sampled at a clock
frequency of four times the colour subcarrier frequency
(fSC).
A colour subcarrier frequency signal is applied to pin FSC.
The colour subcarrier select input signal (FSCSEL)
indicates whether the colour subcarrier frequency (fSC)or
twice the colour subcarrier frequency (2
× fSC) is being
applied at the FSC input. An external coupling capacitor is
needed for the colour subcarrier input signal.
Comb filter
The sampled CVBS signal is applied to two delay lines.
One delay line delays the signal over 1H (1H = one
line-time).
The direct and delayed signals are applied to an adaptive
comb filter. The adaptive comb filter performs band-pass
filtering around the colour subcarrier frequency and
compares the contents of adjacent lines. In this way the
combing of signals with different information is prevented
and artifacts such as hanging dots are avoided.
Both the combed chrominance and the combed luminance
signal are passed through a reconstruction low-pass filter
to obtain continuous-time signals. These low-pass filters
are 3rd-order, optimized for best performance with respect
to step response and clock suppression. The
reconstructed signals are applied to the output switches.
Output configuration
The luminance output switch selects between the
reconstructed combed luminance signal and one of the
buffered and clamped input signals Y/CVBS1 or Y/CVBS2.
The chrominance output switch selects between the
reconstructed combed chrominance signal and the
chrominance input signal (CIN). An external coupling
capacitor is needed for CIN. The selected signals are
applied to the outputs Y/CVBSOUT and COUT respectively
via a buffer stage. The output switch signal (OUTSEL)
determines whether the output switches select the internal
combed signals or the external Y/C signals.
Clock generation and filter tuning
The clock generator is driven by a Phase-Locked Loop
(PLL) circuit which generates a reference frequency of four
times the colour subcarrier frequency. This PLL circuit is
phase-locked to the colour subcarrier input signal (FSC).
Several internal clock signals are derived from the 4
× fSC
reference.
The filter tuning ensures the automatic alignment of the
anti-alias and the reconstruction low-pass filters. A 4
× fSC
clock signal is used as a reference for the alignment. The
tuning takes place each line during the line blanking and is
initiated by means of an internally generated signal which
is derived from the sandcastle input signal.
If the output switches select external Y/C signals the
oscillator of the PLL circuit is stopped regardless of the
FSC input and no internal clock signals are generated. The
filter tuning is also stopped.


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