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MC10H106FN 데이터시트(PDF) 1 Page - ON Semiconductor |
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MC10H106FN 데이터시트(HTML) 1 Page - ON Semiconductor |
1 / 4 page © Semiconductor Components Industries, LLC, 2000 May, 2000 – Rev. 8 1 Publication Order Number: MC10H106/D MC10H106 Triple 4-3-3-Input NOR Gate The MC10H106 is a triple 4–3–3 input NOR gate. This 10H part is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in propagation delay and no increase in power– supply current. • Propagation Delay, 1.0 ns Typical • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K–Compatible LOGIC DIAGRAM DIP PIN ASSIGNMENT VCC1 BOUT AOUT AIN AIN AIN AIN VEE VCC2 COUT CIN CIN CIN BIN BIN BIN 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 14 12 13 15 11 9 10 2 7 5 3 6 4 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). http://onsemi.com Device Package Shipping ORDERING INFORMATION MC10H106L CDIP–16 25 Units/Rail MC10H106P PDIP–16 25 Units/Rail MC10H106FN PLCC–20 46 Units/Rail MARKING DIAGRAMS 1 16 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week CDIP–16 L SUFFIX CASE 620A MC10H106L AWLYYWW PDIP–16 P SUFFIX CASE 648 PLCC–20 FN SUFFIX CASE 775 10H106 AWLYYWW 1 1 16 MC10H106P AWLYYWW |
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