Fail-Safe Feature:

The LVDS receiver is a high gain, high speed device that

amplifies a small differential signal (20mV) to CMOS logic

levels. Due to the high gain and tight threshold of the re-

ceiver, care should be taken to prevent noise from appearing

as a valid signal.

The receiver’s internal fail-safe circuitry is designed to

source/sink a small amount of current, providing fail-safe

protection (a stable known state of HIGH output voltage) for

floating, terminated or shorted receiver inputs.

1.

Open Input Pins. The DS90LV012A and DS90LT012A

are single receiver devices. Do not tie the receiver inputs

to ground or any other voltages. The input is biased by

internal high value pull up and pull down resistors to set

the output to a HIGH state. This internal circuitry will

guarantee a HIGH, stable output state for open inputs.

2.

Terminated Input. If the driver is disconnected (cable

unplugged), or if the driver is in a power-off condition,

the receiver output will again be in a HIGH state, even

with the end of cable 100

Ω termination resistor across

the input pins. The unplugged cable can become a

floating antenna which can pick up noise. If the cable

picks up more than 10mV of differential noise, the re-

ceiver may see the noise as a valid signal and switch. To

insure that any noise is seen as common-mode and not

differential, a balanced interconnect should be used.

Twisted pair cable will offer better balance than flat

ribbon cable.

3.

Shorted Inputs. If a fault condition occurs that shorts

the receiver inputs together, thus resulting in a 0V differ-

ential input voltage, the receiver output will remain in a

HIGH state. Shorted input fail-safe is not supported

across the common-mode range of the device (GND to

2.4V). It is only supported with inputs shorted and no

external common-mode voltage applied.

External lower value pull up and pull down resistors (for a

stronger bias) may be used to boost fail-safe in the presence

of higher noise levels. The pull up and pull down resistors

should be in the 5k

Ω to 15kΩ range to minimize loading and

waveform distortion to the driver. The common-mode bias

point should be set to approximately 1.2V (less than 1.75V)

to be compatible with the internal circuitry.

The DS90LV012A and DS90LT012A are compliant to the

original ANSI EIA/TIA-644 specification and is also compliant

to the new ANSI EIA/TIA-644-A specification with the excep-

tion the newly added

∆I

fail-safe circuitry,

∆I

fied. This exception will not be relevant unless more than 10

receivers are used.

Additional information on fail-safe biasing of LVDS devices

may be found in AN-1194.

Probing LVDS Transmission Lines:

Ω), low capacitance

scope. Improper probing will give deceiving results.

Cables and Connectors, General Comments:

When choosing cable and connectors for LVDS it is impor-

tant to remember:

Use controlled impedance media. The cables and connec-

tors you use should have a matched differential impedance

of about 100

Ω. They should not introduce major impedance

discontinuities.

Balanced cables (e.g. twisted pair) are usually better than

unbalanced cables (ribbon cable, simple coax) for noise

reduction and signal quality. Balanced cables tend to gener-

ate less EMI due to field canceling effects and also tend to

pick up electromagnetic radiation a common-mode (not dif-

ferential mode) noise which is rejected by the receiver.

work effectively. For distances 0.5M

≤ d ≤ 10M, CAT 3

(category 3) twisted pair cable works well, is readily available

and relatively inexpensive.

Pin Descriptions

Package Pin Number

Pin Name

Description

SOT23

LLP

4

1

IN−

Inverting receiver input pin

3

3

IN+

Non-inverting receiver input pin

5

8

TTL OUT

Receiver output pin

16

V

DD

2

2, 7

GND

Ground pin

4, 5

NC

No connect

Ordering Information

Operating

Package Type/

Order Numbers

Temperature

Number

−40˚C to +85˚C

MF05A

DS90LV012ATMF, DS90LT012ATMF

LDA08A

DS90LV012ATLD, DS90LT012ATLD

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