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GT3200-ABZJ 데이터시트(PDF) 10 Page - SMSC Corporation |
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GT3200-ABZJ 데이터시트(HTML) 10 Page - SMSC Corporation |
10 / 51 page USB2.0 PHY IC Revision 1.3 (10-05-04) 5 SMSC GT3200, SMSC USB3250 DATASHEET Chapter 4 Interface Signal Definition Table 4.1 System Interface Signals NAME DIRECTION ACTIVE LEVEL DESCRIPTION RESET Input High Reset. Reset all state machines. After coming out of reset, must wait 5 rising edges of clock before asserting TXValid for transmit. Assertion of Reset: May be asynchronous to CLKOUT De-assertion of Reset: Must be synchronous to CLKOUT XCVRSELECT Input N/A Transceiver Select. This signal selects between the FS and HS transceivers: 0: HS transceiver enabled 1: FS transceiver enabled. TERMSELECT Input N/A Termination Select. This signal selects between the FS and HS terminations: 0: HS termination enabled 1: FS termination enabled SUSPENDN Input Low Suspend. Places the transceiver in a mode that draws minimal power from supplies. Shuts down all blocks not necessary for Suspend/Resume operation. While suspended, TERMSELECT must always be in FS mode to ensure that the 1.5k Ω pull-up on DP remains powered. 0: Transceiver circuitry drawing suspend current 1: Transceiver circuitry drawing normal current CLKOUT Output Rising Edge System Clock. This output is used for clocking receive and transmit parallel data at 60MHz (8-bit mode) or 30MHz (16-bit mode). When in 8-bit mode, this specification refers to CLKOUT as CLK60. When in 16-bit mode, CLKOUT is referred to as CLK30. OPMODE[1:0] Input N/A Operational Mode. These signals select between the various operational modes: [1] [0] Description 0 0 0: Normal Operation 0 1 1: Non-driving (all terminations removed) 1 0 2: Disable bit stuffing and NRZI encoding 1 1 3: Reserved LINESTATE[1:0] Output N/A Line State. These signals reflect the current state of the USB data bus in FS mode, with [0] reflecting the state of DP and [1] reflecting the state of DM. When the device is suspended or resuming from a suspended state, the signals are combinatorial. Otherwise, the signals are synchronized to CLKOUT. [1] [0] Description 0 0 0: SE0 0 1 1: J State 1 0 2: K State 1 1 3: SE1 DATABUS16_8 Input N/A Databus Select. Selects between 8-bit and 16-bit data transfers. 0: 8-bit data path enabled. VALIDH is undefined. CLKOUT = 60MHz. 1: 16-bit data path enabled. CLKOUT = 30MHz. |
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