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TPS92515 데이터시트(PDF) 17 Page - Texas Instruments |
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TPS92515 데이터시트(HTML) 17 Page - Texas Instruments |
17 / 39 page fSW TA ILED VIN fSW VccEXT TA ILED VIN 17 TPS92515, TPS92515-Q1, TPS92515HV, TPS92515HV-Q1 www.ti.com SLUSBZ6A – APRIL 2016 – REVISED AUGUST 2016 Product Folder Links: TPS92515 TPS92515-Q1 TPS92515HV TPS92515HV-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated • The simple thermal foldback method sizes the divider to set the IADJ voltage above 2.4 V. This method uses the internal clamp when thermal foldback is not required and sets the IADJ voltage below 2.4 V when foldback is required. Match the temperature characteristic of the thermistor to the second resistor in the divider. As an alternative, use a positive temperature coefficient (PTC) thermistor as the upper resistor in the divider. • By using a micro-controller to control the timing output, the duty cycle can be controlled and the voltage can be filtered and connected to the IADJ pin. Use a filter pole of 1/10th the micro-controller control pin output switching frequency, or use R ≈ 1 kΩ and C ≈ 4.7 µF as a starting point. • Simply add a capacitor to the IADJ pin and size the R-C constant to produce the desired soft-start time. Consider the maximum current is reached when VIADJ = 2.4 V. • To achieve the highest accuracy, use an external, high-precision reference and power it from the TPS92515 VCC if required. A 1% or 2% Zener diode, TL431 device, or an existing precision reference circuit can be used. 8.3.8 Thermal Protection The TPS92515 device incorporates thermal protection circuitry. If the TPS92515 thermal pad is not soldered, or not soldered correctly, the device reaches the thermal shutdown temperature prematurely. Use X-ray inspection or some other means to verify the device thermal pad soldering to ensure correct assembly. Two internal sensing elements ensure proper temperature measurement across the die. One sensing element is located near the internal FET. The other sensing element is located near the VCC regulator. Power dissipation the FET and internal regulator contribute the most to device temperature rise. When the device temperature reaches the thermal shut-down level at the FET sense point, the high-side FET and internal regulator become disabled and switching stops. When thermal shut-down temperature is reached at the regulator sense point, the VCC regulator becomes disabled, and switching stops when VCC falls below the VCCUVLO level. In both cases, after the device lowers 10°C (typical) from the trip temperature, normal operation resumes. 8.3.8.1 Maximum Output Current and Junction Temperature As with all power converter controllers and regulators, practical limits to specification maximums must be considered for each application. For example, it is not possible to operate the TPS92515 with a switching frequency of 1 MHz, output current of 2 A, at an ambient temperature of 125°C and stay within operating limits. Conversion factors and environment must be considered. This section describes two conversion scenarios with different operating conditions that would result in approximately the same junction temperature. In each case all of the power loss factors combine to develop the device junction temperature. Figure 24 describes a design with half the output current and a lower switching frequency compared to that shown in Figure 23. However, the design shown in Figure 24 has a higher ambient temperature, higher VIN and an additional external VCC load, resulting in similar junction temperature. Table 2 lists trade-offs and impact on temperature. In general, applications requiring high current (2 A) or a high switching frequency (> 1 MHz) provide reduced maximum ambient temperature levels. ILED = 1 A VIN = 14 V fSW = 500 kHz TA = 85°C Figure 23. Power Balanced ILED = 500 mA TA = 125°C fSW = 300 kHz External VCC load = 500 µA VIN = 60 V Figure 24. Power Unbalanced |
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