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MC100EPT23DR2G 데이터시트(PDF) 5 Page - ON Semiconductor

부품명 MC100EPT23DR2G
상세설명  3.3 V Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
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제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100EPT23DR2G 데이터시트(HTML) 5 Page - ON Semiconductor

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MC100EPT23
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Figure 2. Typical VOH / Jitter Versus Frequency (255C)
FREQUENCY (MHz)
0.0
1.0
2.0
3.0
VOH
VOL  0.5 V
JITTER
0
100
200
300
400
12
8
4
0
Figure 3. TTL Output Loading Used for Device Evaluation
CHARACTERISTIC TEST
CL*RL
AC TEST LOAD
GND
*CL includes
fixture
capacitance
APPLICATION
TTL RECEIVER
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices


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